Thesis Details

Transformace popisu procesoru v jazyce CodAL do struktur SystemC

Bachelor's Thesis Student: Ondruš Tomáš Academic Year: 2014/2015 Supervisor: Přikryl Zdeněk, Ing., Ph.D.
English title
Transformation of a Processor Description in CodAL to SystemC Structures
Language
Czech
Abstract

The goal of this thesis is to create a generator of simulators and hardware representation of application specific processors in a SystemC language. An aim of the first part is to create a wrapper layer compatible with SystemC TLM 2.0 that wraps an existing simulator to avail modeling of transaction oriented systems. The second part is a generator of a hardware representation for the processor that is suitable not only for logical synthesis, but also for the simulation on a cycle accurate level. A final result is a state of the art solution comparable to existing generators.

Keywords

SystemC, Codasip, CodAL, TLM, generator, processor, ASIP, transaction oriented systems

Department
Degree Programme
Information Technology
Status
defended, grade A
Date
15 June 2015
Reviewer
Committee
Sekanina Lukáš, prof. Ing., Ph.D. (DCSY FIT BUT), předseda
Grézl František, Ing., Ph.D. (DCGM FIT BUT), člen
Hrubý Martin, Ing., Ph.D. (DITS FIT BUT), člen
Jaroš Jiří, doc. Ing., Ph.D. (DCSY FIT BUT), člen
Švéda Miroslav, prof. Ing., CSc. (DIFS FIT BUT), člen
Citation
ONDRUŠ, Tomáš. Transformace popisu procesoru v jazyce CodAL do struktur SystemC. Brno, 2015. Bachelor's Thesis. Brno University of Technology, Faculty of Information Technology. 2015-06-15. Supervised by Přikryl Zdeněk. Available from: https://www.fit.vut.cz/study/thesis/17200/
BibTeX
@bachelorsthesis{FITBT17200,
    author = "Tom\'{a}\v{s} Ondru\v{s}",
    type = "Bachelor's thesis",
    title = "Transformace popisu procesoru v jazyce CodAL do struktur SystemC",
    school = "Brno University of Technology, Faculty of Information Technology",
    year = 2015,
    location = "Brno, CZ",
    language = "czech",
    url = "https://www.fit.vut.cz/study/thesis/17200/"
}
Back to top