Thesis Details

Parazitní kapacity při řešení elektrických obvodů

Bachelor's Thesis Student: Kadák Michal Academic Year: 2006/2007 Supervisor: Kunovský Jiří, doc. Ing., CSc.

English title

Electronic Circuits Simulations and Parasitic Capacitances

Language

Czech

Abstract

This work deals with using parasitic capacitances to solve electronic circuits and generate differentials equations as input to TKSL. TKSL is simulation language which allows you to solve large systems of differentials equations. The second part deals with design and implementation of graphic editor, which allows you to draw electronic circuits.

Keywords

TKSL, Taylor series, graphic editor, line drawing, parasitic capacitances, differentials equations, .NET

Department

Department of Intelligent Systems FIT BUT

Degree Programme

Information Technology

Files

Thesis text 1.6 MB

Status

defended, grade A

Date

12 June 2007

Reviewer

Konvalina Jiří, Ing.

Committee

Meduna Alexander, prof. RNDr., CSc. (DIFS FIT BUT), předseda
Herout Pavel, doc. Ing., Ph.D. (WBU in Pilsen), člen
Lukáš Roman, Ing., Ph.D. (DIFS FIT BUT), člen
Růžička Richard, doc. Ing., Ph.D., MBA (DCSY FIT BUT), člen
Strnadel Josef, Ing., Ph.D. (DCSY FIT BUT), člen
Zbořil František, doc. Ing., Ph.D. (DITS FIT BUT), člen

Citation

KADÁK, Michal. Parazitní kapacity při řešení elektrických obvodů. Brno, 2007. Bachelor's Thesis. Brno University of Technology, Faculty of Information Technology. 2007-06-12. Supervised by Kunovský Jiří. Available from: https://www.fit.vut.cz/study/thesis/5914/

BibTeX

@bachelorsthesis{FITBT5914,
    author = "Michal Kad\'{a}k",
    type = "Bachelor's thesis",
    title = "Parazitn\'{i} kapacity p\v{r}i \v{r}e\v{s}en\'{i} elektrick\'{y}ch obvod\r{u}",
    school = "Brno University of Technology, Faculty of Information Technology",
    year = 2007,
    location = "Brno, CZ",
    language = "czech",
    url = "https://www.fit.vut.cz/study/thesis/5914/"
}

Theses