Ing.

Josef Strnadel

Ph.D.

Assistant professor

+420 54114 1211
strnadel@fit.vut.cz
Office L332

[photo]

Projects

  • 2020

    Design, Optimization and Evaluation of Application Specific Computer Systems, BUT, FIT-S-20-6309, 2020-2022, running, start: 2020-03-01, end: 2022-12-31
    Detail

  • 2019

    Designing and exploiting libraries of approximate circuits, GACR, GA19-10137S, 2019-2021, running, start: 2019-01-01, end: 2021-12-31
    Detail

  • 2017

    Advanced parallel and embedded computer systems, BUT, FIT-S-17-3994, 2017-2019, completed, start: 2017-03-01, end: 2019-12-31
    Detail

    Moderní a otevřené studium techniky (MOST), MŠMT CR, 2017-2022, running, start: 2017-09-01, end: 2022-12-31
    Detail

  • 2016

    Advancing cryptanalytic methods through evolutionary computing, GACR, GA16-08565S, 2016-2018, completed, start: 2016-01-01, end: 2018-12-31
    Detail

    IT4Innovations excellence in science, MŠMT CR, LQ1602, 2016-2020, running, start: 2016-01-01, end: 2020-12-31
    Detail

  • 2014

    Architecture of parallel and embedded computer systems, BUT, FIT-S-14-2297, 2014-2016, completed, start: 2014-03-01, end: 2016-12-31
    Detail

    Development of FreeRTOS driver for reconfigurable platform, RehiveTech, 2014-2015, completed, start: 2014-06-02, end: 2015-03-31
    Detail

    Unconventional Design Techniques for Intrinsic Reconfiguration of Digital Circuits: From Materials to Implementation, MŠMT CR, LD14055, 2014-2017, completed, start: 2014-05-05, end: 2017-05-31
    Detail

  • 2012

    Methodologies for Fault Tolerant Systems Design Development, Implementation and Verification, MŠMT CR, LD12036, 2012-2015, completed, start: 2012-03-01, end: 2015-11-30
    Detail

  • 2011

    Advanced secured, reliable and adaptive IT, BUT, FIT-S-11-1, 2011-2013, completed, start: 2011-01-01, end: 2013-12-31
    Detail

    The IT4Innovations Centre of Excellence, MŠMT CR, ED1.1.00/02.0070, 2011-2015, completed, start: 2011-01-01, end: 2015-12-31
    Detail

  • 2010

    Laboratory for design and prototyping of an advanced electronic systems, FRVŠ MŠMT, FR2789/2010/Aa, 2010, completed, start: 2010-01-12, end: 2010-12-31
    Detail

    Secured, reliable and adaptive computer systems, BUT, FIT-S-10-1, 2010, completed, start: 2010-03-01, end: 2010-12-31
    Detail

  • 2009

    SoC circuits reliability and availability improvement, GACR, GA102/09/1668, 2009-2011, completed, start: 2009-01-01, end: 2011-12-31
    Detail

  • 2007

    Security-Oriented Research in Information Technology, CEZ MŠMT, MSM0021630528, 2007-2013, completed, start: 2007-01-01, end: 2013-12-31
    Detail

  • 2005

    Optimizing Methods in Digital Systems Diagnosis, GACR, GP102/05/P193, 2005-2007, completed, start: 2005-01-01, end: 2007-12-31
    Detail

  • 2004

    Modern Methods of Digital Systems Design, GACR, GA102/04/0737, 2004-2006, completed, start: 2004-01-01, end: 2006-12-31
    Detail

  • 2002

    Application of Evolution Approaches for Digital Circuit Testability Enhancement, FRVŠ MŠMT, FR1754/2002/G1, 2002, completed, start: 2002-01-01, end: 2002-12-31
    Detail

  • 2001

    Formal Approaches in Digital Design Diagnostics - Testable Design Verification, GACR, GA102/01/1531, 2001-2003, completed, start: 2001-01-01, end: 2003-12-31
    Detail

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