Project Details

Přibližná ekvivalence pro aproximativní počítání

Project Period: 1.1.2016 - 31.12.2018

Code: GA16-17538S

Agency: Czech Science Foundation

Program: Standardní projekty

English title
Relaxed equivalence checking for approximate computing
approximate computing; genetic programming; evolvable hardware; relaxed equivalence checking; automata; logic
Approximate computing is a promising approach to obtain energy-efficient computer systems. It exploits the fact that many applications are error resilient, i.e., do not require a perfect output to be produced. An open problem is how to effectively obtain approximations that are good compromises between the error ratio, power consumption, and performance. Using evolutionary algorithms for the approximation has led to promising results, but it suffers from scalability problems in evaluating candidate solutions. For that, we propose a novel way: using advanced methods of formal verification redesigned to quickly calculate distances between candidate approximations and the reference implementation, which we call relaxed equivalence checking. The project seeks the following original contributions: (1) efficient algorithms for relaxed equivalence checking of combinational (stateless) and sequential (stateful) systems, (2) approximation algorithms based on genetic programming using the proposed relaxed equivalence checking, (3) experimental evaluation of the proposed approximation methods.
Team members
Vojnar Tomáš, prof. Ing., Ph.D. (UITS FIT VUT) , research leader
Češka Milan, RNDr., Ph.D. (UITS FIT VUT)
Dvořáček Petr, Ing. (UPSY FIT VUT)
Fiedor Tomáš, Ing. (UITS FIT VUT)
Havlena Vojtěch, Ing. (UITS FIT VUT)
Havlena Vojtěch, Ing. (FIT VUT)
Holík Lukáš, Mgr., Ph.D. (UITS FIT VUT)
Hrbáček Radek, Ing. (UPSY FIT VUT)
Hruška Martin, Ing. (UITS FIT VUT)
Husa Jakub, Ing. (UPSY FIT VUT)
Janků Petr, Ing. (UITS FIT VUT)
Kešner Filip, Ing. (UPSY FIT VUT)
Kidoň Marek, Ing. (UPSY FIT VUT)
Kocnová Jitka, Ing. (FIT VUT)
Lengál Ondřej, Ing., Ph.D. (UITS FIT VUT)
Malásková Věra (UITS FIT VUT)
Malík Viktor, Ing. (UITS FIT VUT)
Martiček Štefan, Ing. (FIT VUT)
Matyáš Jiří, Ing. (FIT VUT)
Mrázek Vojtěch, Ing., Ph.D. (UPSY FIT VUT)
Peringer Petr, Dr. Ing. (UITS FIT VUT)
Rogalewicz Adam, doc. Mgr., Ph.D. (UITS FIT VUT)
Sekanina Lukáš, prof. Ing., Ph.D. (UPSY FIT VUT)
Semrič Jakub, Bc. (FIT VUT)
Síč Juraj, Bc. (VCIT FIT VUT)
Vašíček Zdeněk, doc. Ing., Ph.D. (UPSY FIT VUT)
Vaverka Filip, Ing. (UPSY FIT VUT)
Wiglasz Michal, Ing. (UPSY FIT VUT)
Žufan Petr, Bc. (FIT VUT)







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