Project Details
Pokročilé paralelní a vestavěné počítačové systémy
Project Period: 1. 3. 2017 - 31. 12. 2019
Project Type: grant
Code: FIT-S-17-3994
Agency: Brno University of Technology
Program: Vnitřní projekty VUT
embedded system, field programmable gate array, parallel system, optimization
Searching and validating new algorithms and computing platforms that can be used to design, optimize and implement modern computer systems. We primarily will deal with systems that are based on reconfigurable or multiprocessor architectures, have built-in systems, a higher level of reliability, and optimization based on a variety of criteria. Emphasis is placed on intensifying the PhD student's share of results and the presentation of results at international level.
Bardonek Petr, Ing. (UPSY FIT VUT) , team leader
Bartoš Václav, Ing. (UPSY FIT VUT) , team leader
Bidlo Michal, doc. Ing., Ph.D. (UPSY FIT VUT) , team leader
Bordovský Gabriel, Ing. (UPSY FIT VUT) , team leader
Budiský Jakub, Ing. (UPSY FIT VUT) , team leader
Crha Adam, Ing., Ph.D. (UPSY FIT VUT) , team leader
Čekan Ondřej, Ing., Ph.D. (UPSY FIT VUT) , team leader
Čudová Marta, Ing. (UPSY FIT VUT) , team leader
Dobai Roland, Ing., Ph.D. (UPSY FIT VUT) , team leader
Fučík Otto, doc. Dr. Ing. (UPSY FIT VUT) , team leader
Fukač Tomáš, Ing. (UPSY FIT VUT) , team leader
Grochol David, Ing., Ph.D. (UPSY FIT VUT) , team leader
Hodaň David, Ing. (UPSY FIT VUT) , team leader
Hrbáček Radek, Ing. (UPSY FIT VUT) , team leader
Husa Jakub, Ing. (UPSY FIT VUT) , team leader
Hyrš Martin, Ing., Ph.D. (UPSY FIT VUT) , team leader
Iša Radek, Ing. (UPSY FIT VUT) , team leader
Jaroš Jiří, doc. Ing., Ph.D. (UPSY FIT VUT) , team leader
Kadlubiak Kristián, Ing. (UPSY FIT VUT) , team leader
Kekely Lukáš, Ing., Ph.D. (UPSY FIT VUT) , team leader
Kekely Michal, Ing. (UPSY FIT VUT) , team leader
Kešner Filip, Ing. (UPSY FIT VUT) , team leader
Kidoň Marek, Ing. (UPSY FIT VUT) , team leader
Kocnová Jitka, Ing., Ph.D. (UPSY FIT VUT) , team leader
Kořenek Jan, doc. Ing., Ph.D. (UPSY FIT VUT) , team leader
Krčma Martin, Ing. (UPSY FIT VUT) , team leader
Krobot Pavel, Ing. (UPSY FIT VUT) , team leader
Kučera Jan, Ing. (UPSY FIT VUT) , team leader
Kukliš Filip, Ing. (UPSY FIT VUT) , team leader
Lojda Jakub, Ing., Ph.D. (UPSY FIT VUT) , team leader
Martínek Tomáš, doc. Ing., Ph.D. (UPSY FIT VUT) , team leader
Matoušek Denis, Ing. (UPSY FIT VUT) , team leader
Matoušek Jiří, Ing., Ph.D. (UPSY FIT VUT) , team leader
Mrázek Vojtěch, Ing., Ph.D. (UPSY FIT VUT) , team leader
Nevoral Jan, Ing., Ph.D. (UPSY FIT VUT) , team leader
Nikl Vojtěch, Ing. (UPSY FIT VUT) , team leader
Orsák Michal, Ing. (UPSY FIT VUT) , team leader
Pánek Richard, Ing. (UPSY FIT VUT) , team leader
Podivínský Jakub, Ing., Ph.D. (UPSY FIT VUT) , team leader
Riša Michal, Ing. (UPSY FIT VUT) , team leader
Růžička Richard, doc. Ing., Ph.D., MBA (UPSY FIT VUT) , team leader
Smatana Stanislav, Ing. (UPSY FIT VUT) , team leader
Strnadel Josef, Ing., Ph.D. (UPSY FIT VUT) , team leader
Szurman Karel, Ing., Ph.D. (UPSY FIT VUT) , team leader
Šimek Václav, Ing. (UPSY FIT VUT) , team leader
Tisovčík Peter, Ing. (UPSY FIT VUT) , team leader
Vašíček Zdeněk, doc. Ing., Ph.D. (UPSY FIT VUT) , team leader
Vaverka Filip, Ing. (UPSY FIT VUT) , team leader
Viktorin Jan, Ing. (UPSY FIT VUT) , team leader
Vrána Roman, Ing. (UPSY FIT VUT) , team leader
Wiglasz Michal, Ing. (UPSY FIT VUT) , team leader
Wrona Jan, Ing. (UPSY FIT VUT) , team leader
Zachariášová Marcela, Ing., Ph.D. (UPSY FIT VUT) , team leader
2020
- MICENKOVÁ Lenka, BOSÁK Juraj, SMATANA Stanislav, NOVOTNÝ Adam, BUDINSKÁ Eva and ŠMAJS David. Administration of the Probiotic Escherichia coli Strain A0 34/86 Resulted in a Stable Colonization of the Human Intestine During the First Year of Life. Probiotics and Antimicrobial Proteins, vol. 12, no. 2, 2020, pp. 343-350. ISSN 1867-1314. Detail
2019
- VRÁNA Roman, KOŘENEK Jan and NOVÁK David. Acceleration of Feature Extraction for Real-Time Analysis of Encrypted Network Traffic. In: Proceedings - 2019 22nd International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2019. Cluj-Napoca: Institute of Electrical and Electronics Engineers, 2019, pp. 1-6. ISBN 978-1-7281-0073-9. Detail
- JAROŠ Marta, TREEBY Bradley E. and JAROŠ Jiří. Adaptive Execution Planning in Biomedical Workflow Management Systems. Ostrava, 2019. Detail
- JAROŠ Marta. Adaptive Execution Planning in Workflow Management Systems. In: Počítačové architektury a diagnostika 2019. Doksy: Academic and Medical Conference Agency, 2019, pp. 23-26. ISBN 978-80-88214-20-5. Detail
- JAROŠ Marta, JAROŠ Jiří and TREEBY Bradley E. Adaptive Execution Planning in Workflow Management Systems. Denver, 2019. Detail
- HYRŠ Martin and SCHWARZ Josef. An Analysis of Control Parameters of Copula-based EDA Algorithm with Model Migration. In: GECCO '19 Proceedings of the Genetic and Evolutionary Computation Conference Companion. Praha: Association for Computing Machinery, 2019, pp. 259-260. ISBN 978-1-4503-6748-6. Detail
- SZURMAN Karel and KOTÁSEK Zdeněk. Coarse-Grained TMR Soft-Core Processor Fault Tolerance Methods and State Synchronization for Run-Time Fault Recovery. In: 20th IEEE Latin American Test Symposium (LATS 2019). Santiago: IEEE Computer Society, 2019, pp. 32-35. ISBN 978-1-7281-1756-0. Detail
- KRČMA Martin, KOTÁSEK Zdeněk and LOJDA Jakub. Detecting hard synapses faults in artificial neural networks. In: 20th IEEE Latin American Test Symposium (LATS 2019). Santiago de Chile: IEEE Computer Society, 2019, pp. 1-6. ISBN 978-1-7281-1756-0. Detail
- PODIVÍNSKÝ Jakub, LOJDA Jakub and KOTÁSEK Zdeněk. Extended Reliability Analysis of Fault-Tolerant FPGA-based Robot Controller. In: 20th IEEE Latin American Test Symposium (LATS 2019). Santiago: IEEE Computer Society, 2019, pp. 97-100. ISBN 978-1-7281-1756-0. Detail
- SZURMAN Karel and KOTÁSEK Zdeněk. Fault Recovery for Coarse-Grained TMR Soft-Core Processor Using Partial Reconfiguration and State Synchronization. In: Proceedings of the 7th Prague Embedded Systems Workshop. Roztoky u Prahy: Faculty of Information Technology, Czech Technical University, 2019, pp. 6-7. ISBN 978-80-01-06607-2. Detail
- TREEBY Bradley E., JAROŠ Jiří, MARTIN Eleanor and COX Ben T. From Biology to Bytes: Predicting the Path of Ultrasound Waves Through the Human Body. Acoustics Today, vol. 15, no. 2, 2019, pp. 36-44. ISSN 1557-0223. Detail
- SEKANINA Lukáš, HU Ting, LOURENÇO Nuno, RICHTER Hendrik and GARCÍA-SÁNCHEZ Pablo, ed. Genetic Programming 22nd European Conference. Lecture Notes in Computer Science, vol. 11451. Cham: Springer International Publishing, 2019. ISBN 978-3-030-16669-4. Detail
- FUKAČ Tomáš and KOŘENEK Jan. Hash-based Pattern Matching for High Speed Networks. In: Proceedings - 2019 22nd International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2019. Cluj-Napoca: Institute of Electrical and Electronics Engineers, 2019, pp. 1-5. ISBN 978-1-7281-0073-9. Detail
- KOCNOVÁ Jitka and VAŠÍČEK Zdeněk. Impact of subcircuit selection on the efficiency of CGP-based optimization of gate-level circuits. In: GECCO '19 Proceedings of the Genetic and Evolutionary Computation Conference Companion. New York: Association for Computing Machinery, 2019, pp. 377-378. ISBN 978-1-4503-6748-6. Detail
- STAMENKOVIC Zoran, BOSIO Alberto, CSEREY Gyorgy, NOVÁK Ondřej, PLESKACZ Witold, SEKANINA Lukáš, STEININGER Andreas, STOJANOVIC Goran and STOPJAKOVÁ Viera. International Symposium on Design and Diagnostics of Electronic Circuits and Systems. In: 2019 IEEE International Test Conference. Washington, DC: Institute of Electrical and Electronics Engineers, 2019, pp. 1-4. ISBN 978-1-7281-4823-6. Detail
- BORDOVSKÝ Gabriel and JAROŠ Jiří. On the Complexity of Photoacoustic Tomography: A Trade-off Between Image Quality and Computational Cost. Solaň, 2019. Detail
- KUKLIŠ Filip. Optimization of Evolutionary Strategy using Island Model to Design HIFU Treatment Plans. In: Sborník semináře PAD 2019. Doksy: Academic and Medical Conference Agency, 2019, pp. 5-8. ISBN 978-80-88214-20-5. Detail
- CRHA Adam, ŠIMEK Václav and RŮŽIČKA Richard. PAIG Rewriting: The Way to Scalable Multifunctional Digital Circuits Synthesis. In: 22nd Euromicro Conference on Digital System Design. Kallithea, Chalkidiki: Institute of Electrical and Electronics Engineers, 2019, pp. 335-342. ISBN 978-1-7281-2861-0. Detail
- BORDOVSKÝ Gabriel. Photoacoustic Reconstruction with Progressive Grid Refinement. Ostrava, 2019. Detail
- NEVORAL Jan, ŠIMEK Václav and RŮŽIČKA Richard. PoLibSi: Path Towards Intrinsically Reconfigurable Components. In: 2019 22nd Euromicro Conference on Digital System Design (DSD). Kallithea, Chalkidiki: Institute of Electrical and Electronics Engineers, 2019, pp. 328-334. ISBN 978-1-7281-2861-0. Detail
- LOJDA Jakub, PODIVÍNSKÝ Jakub and KOTÁSEK Zdeněk. Reliability Indicators for Automatic Design and Analysis of Fault-Tolerant FPGA Systems. In: 20th IEEE Latin American Test Symposium (LATS 2019). Santiago: IEEE Computer Society, 2019, pp. 93-96. ISBN 978-1-7281-1756-0. Detail
- SZURMAN Karel and KOTÁSEK Zdeněk. Run-Time Reconfigurable Fault Tolerant Architecture for Soft-Core Processor neo430. In: 22nd International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2019). Cluj-Napoca: IEEE Computer Society, 2019, pp. 136-140. ISBN 978-1-7281-0073-9. Detail
- FIŠER Petr, HÁLEČEK Ivo, SCHMIDT Jan and ŠIMEK Václav. SAT-Based Generation of Optimum Circuits with Polymorphic Behavior Support. Journal of Circuits, Systems and Computers, vol. 28, no. 1, 2019, pp. 1-29. ISSN 1793-6454. Detail
- JAROŠ Marta, TREEBY Bradley E. and JAROŠ Jiří. Scientific workflow management framework. Soláň, 2019. Detail
- ČEKAN Ondřej, PODIVÍNSKÝ Jakub, LOJDA Jakub, PÁNEK Richard, KRČMA Martin and KOTÁSEK Zdeněk. Smart Electronic Locks and Their Reliability. In: Proceedings of the 7th Prague Embedded Systems Workshop. Roztoky u Prahy: Czech Technical University, 2019, pp. 4-5. ISBN 978-80-01-06607-2. Detail
- ČEKAN Ondřej, PODIVÍNSKÝ Jakub, LOJDA Jakub, PÁNEK Richard, KRČMA Martin and KOTÁSEK Zdeněk. Testing Reliability of Smart Electronic Locks: Analysis and the First Steps Towards. In: Proceedings of the 2019 22nd Euromicro Conference on Digital System Design. Kalithea: Institute of Electrical and Electronics Engineers, 2019, pp. 506-513. ISBN 978-1-7281-2861-0. Detail
- KOCNOVÁ Jitka and VAŠÍČEK Zdeněk. Towards a Scalable EA-based Optimization of Digital Circuits. In: Genetic Programming 22nd European Conference, EuroGP 2019. Cham: Springer International Publishing, 2019, pp. 81-97. ISBN 978-3-030-16669-4. Detail
- VAVERKA Filip. Towards Large-scale Ultrasound Simulations in Soft Tissue for Medical Applications. In: PAD 2019. Doksy: Academic and Medical Conference Agency, 2019, pp. 64-67. ISBN 978-80-88214-20-5. Detail
- STRNADEL Josef. Using Statistical Model Checking to Assess Reliability for Bathtub-Shaped Failure Rates. In: Design, Automation & Test in Europe Conference & Exhibition (DATE). Florence: IEEE Computer Society, 2019, pp. 614-617. ISBN 978-3-9819263-2-3. Detail
2018
- CASTELLI Mauro, SEKANINA Lukáš, ZHANG Mengjie, CAGNONI Stefano and GARCÍA-SÁNCHEZ Pablo, ed. 21st European Conference on Genetic Programming. Lecture Notes in Computer Science, vol. 10781. Berlin: Springer International Publishing, 2018. ISBN 978-3-319-77552-4. Detail
- PODIVÍNSKÝ Jakub, LOJDA Jakub and KOTÁSEK Zdeněk. An Experimental Evaluation of Fault-Tolerant FPGA-based Robot Controller. In: Proceedings of IEEE East-West Design & Test Symposium. Kazan: IEEE Computer Society, 2018, pp. 63-69. ISBN 978-1-5386-5710-2. Detail
- LOJDA Jakub and KOTÁSEK Zdeněk. Automatizace návrhu spolehlivých systémů a její dílčí komponenty. In: Počítačové architektury & diagnostika 2018. Stachy: University of West Bohemia in Pilsen, 2018, pp. 5-8. ISBN 978-80-261-0814-6. Detail
- NEVORAL Jan, RŮŽIČKA Richard and ŠIMEK Václav. CMOS Gates with Second Function. In: 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). Hong Kong: IEEE Computer Society, 2018, pp. 82-87. ISBN 978-1-5386-7099-6. Detail
- NEVORAL Jan and RŮŽIČKA Richard. Efficient Implementation of Bi-functional RTL Components - Case Study. In: 2018 New Generation of CAS (NGCAS). Valletta: IEEE Circuits and Systems Society, 2018, pp. 25-28. ISBN 978-1-5386-7680-6. Detail
- PODIVÍNSKÝ Jakub, LOJDA Jakub, ČEKAN Ondřej and KOTÁSEK Zdeněk. Evaluation Platform for Testing Fault Tolerance Properties: Soft-core Processor-based Experimental Robot Controller. In: Proceedings of the 2018 21st Euromicro Conference on Digital System Design. Praha: IEEE Computer Society, 2018, pp. 229-236. ISBN 978-1-5386-7376-8. Detail
- MRÁZEK Vojtěch and VAŠÍČEK Zdeněk. Evolutionary Design of Large Approximate Adders Optimized for Various Error Criteria. In: Proceedings of the Genetic and Evolutionary Computation Conference Companion (GECCO '18). Kyoto: Association for Computing Machinery, 2018, pp. 294-295. ISBN 978-1-4503-5764-7. Detail
- LOJDA Jakub and KOTÁSEK Zdeněk. Fault Tolerance in HLS for the Purposes of Reliable System Design Automation. In: Proceedings of the 6th Prague Embedded Systems Workshop. Roztoky u Prahy: Faculty of Information Technology, Czech Technical University, 2018, pp. 31-32. ISBN 978-80-01-06456-6. Detail
- LOJDA Jakub, PODIVÍNSKÝ Jakub and KOTÁSEK Zdeněk. Fault Tolerance Properties of Systems Generated with the Use of High-Level Synthesis. In: Proceedings of IEEE East-West Design & Test Symposium. Kazan: IEEE Computer Society, 2018, pp. 80-86. ISBN 978-1-5386-5710-2. Detail
- PODIVÍNSKÝ Jakub, LOJDA Jakub and KOTÁSEK Zdeněk. FPGA-based Robot Controller: An Experimental Evaluation of Fault Tolerance Properties. In: INFORMAL PROCEEDINGS 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Budapešť, 2018, pp. 9-12. Detail
- NEVORAL Jan, RŮŽIČKA Richard and ŠIMEK Václav. From Ambipolarity to Multifunctionality: Novel Library of Polymorphic Gates Using Double-Gate FETs. In: 2018 21st Euromicro Conference on Digital System Design. Praha: Institute of Electrical and Electronics Engineers, 2018, pp. 657-664. ISBN 978-1-5386-7376-8. Detail
- LOJDA Jakub, PODIVÍNSKÝ Jakub, ČEKAN Ondřej, PÁNEK Richard and KOTÁSEK Zdeněk. FT-EST Framework: Reliability Estimation for the Purposes of Fault-Tolerant Systems Design Automation. In: Proceedings of the 2018 21st Euromicro Conference on Digital System Design. Praha: IEEE Computer Society, 2018, pp. 244-251. ISBN 978-1-5386-7376-8. Detail
- TREFZER Martin A. and SEKANINA Lukáš. Guest Editorial: Bio-inspired Hardware and Evolvable Systems. IET Computers & Digital Techniques, vol. 12, no. 4, 2018. ISSN 1751-8601. Detail
- MATOUŠEK Denis, MATOUŠEK Jiří and KOŘENEK Jan. High-speed Regular Expression Matching with Pipelined Memory-based Automata. Proceedings - 26th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2018. Boulder, CO: IEEE Computer Society, 2018. ISBN 978-1-5386-5522-1. Detail
- SUMBALOVÁ Lenka, ŠTOURAČ Jan, MARTÍNEK Tomáš, BEDNÁŘ David and DAMBORSKÝ Jiří. HotSpot Wizard 3.0: Web Server for Automated Design of Mutations and Smart Libraries based on Sequence Input Information. Nucleic Acids Research, vol. 46, no. 1, 2018, pp. 356-362. ISSN 1362-4962. Detail
- ČEKAN Ondřej, PÁNEK Richard and KOTÁSEK Zdeněk. Input and Output Generation for the Verification of ALU: a Use Case. In: Proceedings of 2018 IEEE East-West Design and Test Symposium, EWDTS 2018. Kazan: IEEE Computer Society, 2018, pp. 331-336. ISBN 978-1-5386-5710-2. Detail
- LOJDA Jakub, PODIVÍNSKÝ Jakub, KOTÁSEK Zdeněk and KRČMA Martin. Majority Type and Redundancy Level Influences on Redundant Data Types Approach for HLS. In: 2018 16th Biennial Baltic Electronics Conference (BEC). Tallinn: IEEE Computer Society, 2018, pp. 1-4. ISBN 978-1-5386-7312-6. Detail
- PÁNEK Richard. Metodika návrhu řadiče rekonfigurace pro Systémy odolné proti poruchám. In: Počítačové architektury & diagnostika 2018. Stachy: University of West Bohemia in Pilsen, 2018, pp. 21-24. ISBN 978-80-261-0814-6. Detail
- NIKL Vojtěch, ŘÍHA Lubomír, VYSOCKÝ Ondřej and ZAPLETAL Jan. Optimal Hardware Parameters Prediction for Best Energy-to-Solution of Sparse Matrix Operations Using Machine Learning Techniques. In: INFOCOMP 2018. The Eighth International Conference on Advanced Communications and Computation. Barcelona: International Academy, Research, and Industry Association, 2018, pp. 43-48. ISBN 978-1-61208-655-2. Detail
- FIŠER Petr and ŠIMEK Václav. Optimum Polymorphic Circuits Synthesis Method. In: 13th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS). Taormina: IEEE Circuits and Systems Society, 2018, pp. 1-6. ISBN 978-1-5386-5290-9. Detail
- PÁNEK Richard, LOJDA Jakub, PODIVÍNSKÝ Jakub and KOTÁSEK Zdeněk. Partial Dynamic Reconfiguration in an FPGA-based Fault-Tolerant System: Simulation-based Evaluation. In: Proceedings of IEEE East-West Design & Test Symposium. Kazaň: IEEE Computer Society, 2018, pp. 129-134. ISBN 978-1-5386-5710-2. Detail
- STRNADEL Josef. Predictability Analysis of Interruptible Systems by Statistical Model Checking. IEEE Design & Test, vol. 35, no. 2, 2018, pp. 57-63. ISSN 2168-2356. Detail
- ČEKAN Ondřej, PODIVÍNSKÝ Jakub and KOTÁSEK Zdeněk. Program Generation Through a Probabilistic Constrained Grammar. In: Proceedings - 21st Euromicro Conference on Digital System Design, DSD 2018. Praha: IEEE Computer Society, 2018, pp. 214-220. ISBN 978-1-5386-7376-8. Detail
- ČEKAN Ondřej and KOTÁSEK Zdeněk. Random Test Generation Through a Probabilistic Constrained Grammar. In: INFORMAL PROCEEDINGS 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Budapešť, 2018, pp. 5-8. Detail
- MATOUŠEK Denis, KUBIŠ Juraj, MATOUŠEK Jiří and KOŘENEK Jan. Regular Expression Matching with Pipelined Delayed Input DFAs for High-speed Networks. In: ANCS 2018 - Proceedings of the 2018 Symposium on Architectures for Networking and Communications Systems. Ithaca, NY: Association for Computing Machinery, 2018, pp. 104-110. ISBN 978-1-4503-5902-3. Detail
- JAROŠ Marta. Scientific Workflows Management. In: Počítačové architektúry & diagnostika PAD 2018. Plzeň: University of West Bohemia in Pilsen, 2018, pp. 25-28. ISBN 978-80-261-0814-6. Detail
- STRNADEL Josef. Statistical Model Checking of Processor Systems in Various Interrupt Scenarios. In: Proceedings of 8th International Symposium On Leveraging Applications of Formal Methods, Verification and Validation (ISoLA). Lecture Notes in Computer Science, Vol. 11245. Cham: Springer International Publishing, 2018, pp. 414-429. ISSN 0302-9743. Detail
- PODIVÍNSKÝ Jakub and KOTÁSEK Zdeněk. Testing Fault Tolerance Properties: Soft-core Processor-based Experimental Robot Controller. In: Proceedings of the 6th Prague Embedded Systems Workshop. Roztoky u Prahy: Czech Technical University, 2018, pp. 33-34. ISBN 978-80-01-06456-6. Detail
- CRHA Adam, ŠIMEK Václav and RŮŽIČKA Richard. Towards novel format for representation of polymorphic circuits. In: 13th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS). Taormina: IEEE Circuits and Systems Society, 2018, pp. 1-2. ISBN 978-1-5386-5290-9. Detail
2017
- LOJDA Jakub and KOTÁSEK Zdeněk. A Basic Approach to Fault Tolerance of Data Paths of HLS-synthesized Systems and its Evaluation. In: Proceedings of the 5th Prague Embedded Systems Workshop. Roztoky u Prahy: Faculty of Information Technology, Czech Technical University, 2017, pp. 79-80. ISBN 978-80-01-06178-7. Detail
- ČEKAN Ondřej and KOTÁSEK Zdeněk. A Probabilistic Context-Free Grammar Based Random Test Program Generation. In: Proceedings of 20th Euromicro Conference on Digital System Design. Vídeň: Technical University Wien, 2017, pp. 356-359. ISBN 978-1-5386-2145-5. Detail
- SHAFIQUE Muhammad, HAFIZ Rehan, JAVED Muhammad Usama, ABBAS Sarmad, SEKANINA Lukáš, VAŠÍČEK Zdeněk and MRÁZEK Vojtěch. Adaptive and Energy-Efficient Architectures for Machine Learning: Challenges, Opportunities, and Research Roadmap. In: 2017 IEEE Computer Society Annual Symposium on VLSI. Los Alamitos: IEEE Computer Society Press, 2017, pp. 627-632. ISBN 978-1-5090-6762-6. Detail
- KRČMA Martin and KOTÁSEK Zdeněk. Approximation accuracy of different FPNN types. In: Proceedings of the 5th Prague Embedded Systems Workshop. Roztoky u Prahy: Faculty of Information Technology, Czech Technical University, 2017, pp. 81-82. ISBN 978-80-01-06178-7. Detail
- LOJDA Jakub and KOTÁSEK Zdeněk. Automatizace návrhu systémů odolných proti poruchám pomocí vysokoúrovňové syntézy. In: Počítačové architektury & diagnostika 2017. Smolenice: Slovak University of Technology in Bratislava, 2017, pp. 59-62. ISBN 978-80-972784-0-3. Detail
- LOJDA Jakub, PODIVÍNSKÝ Jakub, KOTÁSEK Zdeněk and KRČMA Martin. Data Types and Operations Modifications: a Practical Approach to Fault Tolerance in HLS. In: Proceedings of IEEE East-West Design & Test Symposium. Novi Sad: IEEE Computer Society, 2017, pp. 273-278. ISBN 978-1-5386-3299-4. Detail
- VYSOCKÝ Ondřej, BESEDA Martin, ŘÍHA Lubomír, ZAPLETAL Jan, NIKL Vojtěch, LYSAGHT Michael and KANNAN Venkatesh. Evaluation of the HPC Applications Dynamic Behavior in Terms of Energy Consumption. In: PROCEEDINGS OF THE FIFTH INTERNATIONAL CONFERENCE ON PARALLEL, DISTRIBUTED, GRID AND CLOUD COMPUTING FOR ENGINEERING. Civil-Comp Proceedings. Stirlingshire: Civil-Comp Press, 2017, pp. 30-49. ISBN 978-1-905088-66-9. Detail
- WIGLASZ Michal and SEKANINA Lukáš. Evolutionary Approximation of Gradient Orientation Module in HOG-based Human Detection System. In: 2017 IEEE Global Conference on Signal and Information Processing GlobalSIP 2017. Montreal: IEEE Signal Processing Society, 2017, pp. 1300-1304. ISBN 978-1-5090-5989-8. Detail
- KIDOŇ Marek and DOBAI Roland. Evolutionary design of hash functions for IP address hashing using genetic programming. In: 2017 IEEE Congress on Evolutionary Computation (CEC). San Sebastian: Institute of Electrical and Electronics Engineers, 2017, pp. 1720-1727. ISBN 978-1-5090-4601-0. Detail
- ČUDOVÁ Marta. Framework for Planning, Running and Monitoring Cooperating Computations. In: Počítačové architektúry & diagnostika PAD 2017. Bratislava: Slovak University of Technology in Bratislava, 2017, pp. 20-23. ISBN 978-80-972784-0-3. Detail
- PODIVÍNSKÝ Jakub, ČEKAN Ondřej, LOJDA Jakub, ZACHARIÁŠOVÁ Marcela, KRČMA Martin and KOTÁSEK Zdeněk. Functional Verification Based Platform for Evaluating Fault Tolerance Properties. Microprocessors and Microsystems, vol. 52, no. 5, 2017, pp. 145-159. ISSN 0141-9331. Detail
- KEKELY Michal and KOŘENEK Jan. Mapping of P4 Match Action Tables to FPGA. In: Preceedings of 27TH INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS. Ghent: Institute of Electrical and Electronics Engineers, 2017, pp. 1-2. ISBN 978-90-90-30428-1. Detail
- KEŠNER Filip, SEKANINA Lukáš and BRÁZDIL Milan. Modular Framework for Detection of Inter-ictal Spikes in iEEG. In: The 39th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC'17). Los Alamos: Institute of Electrical and Electronics Engineers, 2017, pp. 418-421. ISBN 978-1-5090-2809-2. Detail
- STRNADEL Josef. On Dependability Assessment of Fault Tolerant Systems by Means of Statistical Model Checking. In: Proceedings of the 2017 20th Euromicro Conference on Digital System Design. Los Alamitos: IEEE Computer Society, 2017, pp. 352-355. ISBN 978-1-5386-2146-2. Detail
- KEKELY Michal and KOŘENEK Jan. Packet Classification with Limited Memory Resources. In: In proceedings 2017 Euromicro Conference on Digital System Design. Vieden: Institute of Electrical and Electronics Engineers, 2017, pp. 179-183. ISBN 978-1-5386-2145-5. Detail
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