Project Details
Automatizovaný návrh hardwarových akcelerátorů pro strojového učení zohledňující výpočetní zdroje
Project Period: 1. 1. 2021 - 31. 12. 2023
Project Type: grant
Code: GA21-13001S
Agency: Czech Science Foundation
Program: Standardní projekty
evolutionary algorithm, deep neural network, machine learning, accelerator, digital circuit, power consumption, evolvable hardware
Machine learning (ML), particularly the technology based on deep neural networks (DNNs), has already reached and overcome human-level capabilities in many domains. A significant future use of trained ML models is expected in battery powered devices, where the major constraints are energy and the amount of resources available on a chip. The current approach to the DNN design is based on semi-automated simplifying of a network which is created by a human expert who could only partly reflect all hardware implementation aspects. In this project, the aim is to propose and evaluate a methodology for the highly automated design of hardware accelerators of DNNs (and other selected ML methods) that show excellent trade-offs between the output quality, energy and resources used on a single chip. Our approach is based on evolutionary design of such implementations of DNNs (and other ML systems) that reflect a target hardware platform. The proposed method will be evaluated on standard benchmark problems such as image classification and on automated assessment of Parkinsons disease.
Drahošová Michaela, Ing., Ph.D. (UPSY FIT VUT)
Hurta Martin, Ing. (FIT VUT)
Hurta Martin, Ing. (UPSY FIT VUT)
Matoušek Jiří, Ing., Ph.D. (UPSY FIT VUT)
Mrázek Vojtěch, Ing., Ph.D. (UPSY FIT VUT)
Piňos Michal, Ing. (UPSY FIT VUT)
Vašíček Zdeněk, doc. Ing., Ph.D. (UPSY FIT VUT)
Žufan Petr, Ing. (UPSY FIT VUT)
2022
- HANIF Muhammad A., MRÁZEK Vojtěch and SHAFIQUE Muhammad. Approximate Computing Architectures. Handbook of Computer Architecture. Handbook of Computer Architecture. Singapore: Springer Nature Singapore, 2022, pp. 1-41. ISBN 978-981-1564-01-7. Detail
- BOSIO Alberto, DI Carlo Stefano, GIRARD Patrick, RUOSPO Annachiara, SANCHEZ Ernesto, SAVINO Aessandro, SEKANINA Lukáš, TRAIOLA Marcello, VAŠÍČEK Zdeněk and VIRAZEL Arnaud. Design, Verification, Test, and In-Field Implications of Approximate Digital Integrated Circuits. Approximate Computing Techniques. Cham: Springer International Publishing, 2022, pp. 349-385. ISBN 978-3-030-94704-0. Detail
- PIŇOS Michal, MRÁZEK Vojtěch and SEKANINA Lukáš. Evolutionary Approximation and Neural Architecture Search. Genetic Programming and Evolvable Machines, vol. 23, no. 3, 2022, pp. 351-374. ISSN 1389-2576. Detail
- HURTA Martin, DRAHOŠOVÁ Michaela, SEKANINA Lukáš, SMITH Stephen L. and ALTY Jane E. Evolutionary Design of Reduced Precision Levodopa-Induced Dyskinesia Classifiers. In: Genetic Programming, 25th European Conference, EuroGP 2022. Lecture Notes in Computer Science, vol. 13223. Madrid: Springer Nature Switzerland AG, 2022, pp. 85-101. ISBN 978-3-031-02055-1. Detail
- HURTA Martin, DRAHOŠOVÁ Michaela and MRÁZEK Vojtěch. Evolutionary Design of Reduced Precision Preprocessor for Levodopa-Induced Dyskinesia Classifier. In: Parallel Problem Solving from Nature - PPSN XVII. Lecture Notes in Computer Science, vol. 13398. Dortmund: Springer Nature Switzerland AG, 2022, pp. 491-504. ISBN 978-3-031-14713-5. Detail
2021
- SEKANINA Lukáš. Evolutionary Algorithms in Approximate Computing: A Survey. Journal of Integrated Circuits and Systems, vol. 16, no. 2, 2021, pp. 1-12. ISSN 1872-0234. Detail
- PIŇOS Michal, MRÁZEK Vojtěch and SEKANINA Lukáš. Evolutionary Neural Architecture Search Supporting Approximate Multipliers. In: Genetic Programming, 24th European Conference, EuroGP 2021. Lecture Notes in Computer Science, vol 12691, vol. 12691. Seville: Springer Nature Switzerland AG, 2021, pp. 82-97. ISBN 978-3-030-72812-0. Detail
- SEKANINA Lukáš. Neural Architecture Search and Hardware Accelerator Co-Search: A Survey. IEEE Access, vol. 9, no. 9, 2021, pp. 151337-151362. ISSN 2169-3536. Detail