Project Details

Manufacturable and Dependable Multicore Architectures at Nanoscale

Project Period: 15. 6. 2011 - 31. 12. 2015

Project Type: grant

Code: COST IC1103

Agency: COST, European Cooperation in Science and Technology

Program: COST

Czech title
Metodiky pro návrh systémů odolných proti poruchám do rekonfigurovatelných architektur - vývoj, implementace a verifikace

dependability, multicore, architectures, nanoscale, digital circuit, checker, fault tolerant system, SEU, simulation, generator, testing, verification, FPGA, reconfiguration, controller,


Constant advances in manufacturing yield and field reliability are important enabling factors for electronic devices pervading our lives, from medical to consumer electronics, from railways to the automotive and avionics scenarios. At the same time, both technology and architectures are today at a turning point. These manufacturability and dependability issues will be resolved efficiently only if a cross-layer approach that takes into account technology, circuit and architectural aspects will be developed.

The project has these goals and steps of research:

1) Development and implementation of a new methodology for fault tolerant systems design into FPGA including error detection, faults localization, reconfiguration and synchronization after reconfiguration process.

2) Development and implementation of a new methodology for automated generation of diagnostic resources for on-line testing of FPGA based systems.

3) Development of techniques for the verification of fault tolerant systems quality together with SEU injector tool to be used for reconfigurable platforms.

4) Experimental evaluation of the methodology.

5) The analysis of project results.

Team members
Kotásek Zdeněk, doc. Ing., CSc. (UPSY FIT VUT) , research leader
Kaštil Jan, Ing. (UPSY FIT VUT) , team leader
Mičulka Lukáš, Ing. (UPSY FIT VUT) , team leader
Straka Martin, Ing., Ph.D. (UPSY FIT VUT) , team leader
Zachariášová Marcela, Ing., Ph.D. (UPSY FIT VUT) , team leader





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