Faculty of Information Technology, BUT

Publication Details

Using Formal Verification of Parameterized Systems in RAW Hazard Analysis in Microprocessors

CHARVÁT Lukáš, SMRČKA Aleš and VOJNAR Tomáš. Using Formal Verification of Parameterized Systems in RAW Hazard Analysis in Microprocessors. In: Proceedings of 15th International Workshop on Microprocessor Test and Verification (MTV 2014). Austin, TX: IEEE Computer Society, 2014, pp. 83-89. ISBN 978-1-4673-6858-2. Available from: http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7087240
Czech title
Analýza RAW hazardů v mikroprocesorech pomocí formální verifikace parametrizovaných systémů
Type
conference paper
Language
english
Authors
URL
Keywords
automatic formal verification, microprocessor, register transfer level description, parameterised system, RAW hazard
Abstract
Implementation of a pipeline-based execution of instructions in purpose-specific microprocessors is an error prone task, which implies a need of proper verification of the resulting design. Various techniques were proposed for this purpose, but they usually require a significant manual intervention of the developers. In this work, we propose a novel, highly automated approach for discovering RAW hazards in in-order pipelined instruction execution. Our approach combines static analysis of data paths to detect anomalies and possible hazards, followed by a transformation of detected problematic paths to a parameterised system, and a subsequent formal verification to check the possibility of unhandled hazards using techniques for formal verification of parameterised systems. We have implemented our approach and successfully applied it on multiple non-trivial microprocessors.
Published
2014
Pages
83-89
Proceedings
Proceedings of 15th International Workshop on Microprocessor Test and Verification (MTV 2014)
Conference
Microprocessor Test and Verification 2014, Austin, TX, US
ISBN
978-1-4673-6858-2
Publisher
IEEE Computer Society
Place
Austin, TX, US
DOI
BibTeX
@INPROCEEDINGS{FITPUB10742,
   author = "Luk\'{a}\v{s} Charv\'{a}t and Ale\v{s} Smr\v{c}ka and Tom\'{a}\v{s} Vojnar",
   title = "Using Formal Verification of Parameterized Systems in RAW Hazard Analysis in Microprocessors",
   pages = "83--89",
   booktitle = "Proceedings of 15th International Workshop on Microprocessor Test and Verification (MTV 2014)",
   year = 2014,
   location = "Austin, TX, US",
   publisher = "IEEE Computer Society",
   ISBN = "978-1-4673-6858-2",
   doi = "10.1109/MTV.2014.21",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/10742"
}
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