Faculty of Information Technology, BUT

Publication Details

Testing Fault-Tolerance Properties in FPGA based Electro-mechanical Applications

PODIVÍNSKÝ Jakub. Testing Fault-Tolerance Properties in FPGA based Electro-mechanical Applications. In: Počítačové architektury a diagnostika 2014. Liberec: Liberec University of Technology, 2014, pp. 13-18. ISBN 978-80-7494-027-9.
Czech title
Testování FT vlastností u elektro-mechanických systémů
Type
conference paper
Language
english
Authors
Podivínský Jakub, Ing. (DCSY FIT BUT)
Keywords
Fault Tolerance, Electro-mechanical Systems, Fault Injection, SEU
Abstract
The aim of this paper is to present a new platform for estimating the faulttolerance quality of electro-mechanical applications based on FPGAs. We demonstrate one working example of such EM application that was evaluated using our platform: the mechanical robot and its electronic controller in an FPGA. In the experiments, the mechanical
robot is simulated in the simulation environment, where the effects of faults injected into its controller can be seen. In this way, it is possible to differentiate between the fault that causes the failure of the system and the fault that only decreases the performance.
Published
2014
Pages
13-18
Proceedings
Počítačové architektury a diagnostika 2014
Conference
Počítačové architektury a diagnostika 2014, Malá Skála, CZ
ISBN
978-80-7494-027-9
Publisher
Liberec University of Technology
Place
Liberec, CZ
BibTeX
@INPROCEEDINGS{FITPUB10761,
   author = "Jakub Podiv\'{i}nsk\'{y}",
   title = "Testing Fault-Tolerance Properties in FPGA based Electro-mechanical Applications",
   pages = "13--18",
   booktitle = "Po\v{c}\'{i}ta\v{c}ov\'{e} architektury a diagnostika 2014",
   year = 2014,
   location = "Liberec, CZ",
   publisher = "Liberec University of Technology",
   ISBN = "978-80-7494-027-9",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/10761"
}
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