Result Details

Automatic Design of Approximate Circuits by Means of Multi-Objective Evolutionary Algorithms

HRBÁČEK, R.; MRÁZEK, V.; VAŠÍČEK, Z. Automatic Design of Approximate Circuits by Means of Multi-Objective Evolutionary Algorithms. In Proceedings of the 11th International Conference on Design & Technology of Integrated Systems in Nanoscale Era. Istanbul: Istanbul Sehir University, 2016. p. 239-244. ISBN: 978-1-5090-0335-8.
Type
conference paper
Language
English
Authors
Hrbáček Radek, Ing., Ph.D., DCSY (FIT)
Mrázek Vojtěch, Ing., Ph.D., DCSY (FIT)
Vašíček Zdeněk, doc. Ing., Ph.D., DCSY (FIT)
Abstract

Recently, power efficiency has become the most important parameter of many real circuits. At the same time, a wide range of applications capable of tolerating imperfections has spread out especially in multimedia. Approximate computing, an emerging paradigm, takes advantage of relaxed functionality requirements to make computer systems more efficient in terms of energy consumption, speed or complexity. As a result, a variety of trade-offs between error and efficiency can be found. In this paper, a design method based on a multi-objective evolutionary algorithm is proposed. For a given circuit, the method is able to produce a set of Pareto optimal solutions in terms of the error, power consumption and delay. The proposed design method uses Cartesian Genetic Programming for the circuit representation and a modified NSGA-II algorithm for design space exploration. The method is used to design Pareto optimal approximate versions of arithmetic circuits such as multipliers and adders.

Keywords

approximate computing, cartesian genetic programming, evolutionary algorithms, multi-objective optimization

Published
2016
Pages
239–244
Proceedings
Proceedings of the 11th International Conference on Design & Technology of Integrated Systems in Nanoscale Era
Conference
11th International Conference on Design and Technology of Integrated Systems in Nanoscale Era
ISBN
978-1-5090-0335-8
Publisher
Istanbul Sehir University
Place
Istanbul
DOI
10.1109/DTIS.2016.7483885
UT WoS
000386756700022
EID Scopus
2-s2.0-84978438153
BibTeX 
@inproceedings{BUT130937,
  author="Radek {Hrbáček} and Vojtěch {Mrázek} and Zdeněk {Vašíček}",
  title="Automatic Design of Approximate Circuits by Means of Multi-Objective Evolutionary Algorithms",
  booktitle="Proceedings of the 11th International Conference on Design & Technology of Integrated Systems in Nanoscale Era",
  year="2016",
  pages="239--244",
  publisher="Istanbul Sehir University",
  address="Istanbul",
  doi="10.1109/DTIS.2016.7483885",
  isbn="978-1-5090-0335-8",
  url="https://www.fit.vut.cz/research/publication/11080/"
}
Files
Projects
Architektury paralelních a vestavěných počítačových systémů, BUT, Vnitřní projekty VUT, FIT-S-14-2297, start: 2014-01-01, end: 2016-12-31, completed
IT4Innovations excellence in science, MŠMT, Národní program udržitelnosti II, LQ1602, start: 2016-01-01, end: 2020-12-31, completed
Relaxed equivalence checking for approximate computing, GACR, Standardní projekty, GA16-17538S, start: 2016-01-01, end: 2018-12-31, completed
Research groups
Evolvable Hardware Research Group (RG EHW)
Departments
Department of Computer Systems (DCSY)
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