Publication Details

Automatic Design of Arbitrary-Size Approximate Sorting Networks with Error Guarantee

MRÁZEK Vojtěch and VAŠÍČEK Zdeněk. Automatic Design of Arbitrary-Size Approximate Sorting Networks with Error Guarantee. In: Power and Timing Modeling, Optimization and Simulation (PATMOS), 2016 26rd International Workshop on. Bremen: Institute of Electrical and Electronics Engineers, 2016, pp. 221-228. ISBN 978-1-5090-0733-2.
Czech title
Automatický návrh různě velkých aproximačních řadicích sítí s garancí chyby
Type
conference paper
Language
english
Authors
Mrázek Vojtěch, Ing., Ph.D. (DCSY FIT BUT)
Vašíček Zdeněk, doc. Ing., Ph.D. (DCSY FIT BUT)
Keywords


approximate computing
sorting networks
genetic programming

Published
2016
Pages
221-228
Proceedings
Power and Timing Modeling, Optimization and Simulation (PATMOS), 2016 26rd International Workshop on
Conference
26th International Workshop on Power And Timing Modeling, Optimization and Simulation, Bremen, DE
ISBN
978-1-5090-0733-2
Publisher
Institute of Electrical and Electronics Engineers
Place
Bremen, DE
DOI
10.1109/PATMOS.2016.7833691
UT WoS
000401809900038
EID Scopus
2-s2.0-85014115335
BibTeX 
@INPROCEEDINGS{FITPUB11175,
   author = "Vojt\v{e}ch Mr\'{a}zek and Zden\v{e}k Va\v{s}\'{i}\v{c}ek",
   title = "Automatic Design of Arbitrary-Size Approximate Sorting Networks with Error Guarantee",
   pages = "221--228",
   booktitle = "Power and Timing Modeling, Optimization and Simulation (PATMOS), 2016 26rd International Workshop on",
   year = 2016,
   location = "Bremen, DE",
   publisher = "Institute of Electrical and Electronics Engineers",
   ISBN = "978-1-5090-0733-2",
   doi = "10.1109/PATMOS.2016.7833691",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/11175"
}
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