Result Details

Functional Verification as a Tool for Monitoring Impact of Faults in SRAM-based FPGAs

PODIVÍNSKÝ, J.; ČEKAN, O.; LOJDA, J.; KOTÁSEK, Z. Functional Verification as a Tool for Monitoring Impact of Faults in SRAM-based FPGAs. In Proceedings of the 2016 International Conference on Field Programmable Technology. Xi'an: IEEE Computer Society, 2016. p. 293-294. ISBN: 978-1-5090-5602-6.
Type
conference paper
Language
English
Authors
Podivínský Jakub, Ing., Ph.D., DCSY (FIT)
Čekan Ondřej, Ing., Ph.D., DCSY (FIT)
Lojda Jakub, Ing., Ph.D., DCSY (FIT)
Kotásek Zdeněk, doc. Ing., CSc., DCSY (FIT), UTKO (FEEC)
Abstract

The aim of this paper is to present a new platform for evaluating impact of faults on electro-mechanical systems based on SRAM-based FPGAs. Functional verification together with the fault injector serve as a tool for the fault tolerance evaluation. The article demonstrates the use of the verification environment for evaluating impacts of faults in electro-mechanical systems consists of mechanical robot and its electronic controller implemented into FPGA.  The experimental results gained from the verification process are also presented in the paper.

Keywords

Functional Verification
Robot Controller
Electro-mechanical Systems
Fault Tolerance
Maze

Published
2016
Pages
293–294
Proceedings
Proceedings of the 2016 International Conference on Field Programmable Technology
Conference
The 2016 International Conference on Field-Programmable Technology
ISBN
978-1-5090-5602-6
Publisher
IEEE Computer Society
Place
Xi'an
DOI
10.1109/FPT.2016.7929557
UT WoS
000402988900053
EID Scopus
2-s2.0-85021410457
BibTeX 
@inproceedings{BUT131015,
  author="Jakub {Podivínský} and Ondřej {Čekan} and Jakub {Lojda} and Zdeněk {Kotásek}",
  title="Functional Verification as a Tool for Monitoring Impact of Faults in SRAM-based FPGAs",
  booktitle="Proceedings of the 2016 International Conference on Field Programmable Technology",
  year="2016",
  pages="293--294",
  publisher="IEEE Computer Society",
  address="Xi'an",
  doi="10.1109/FPT.2016.7929557",
  isbn="978-1-5090-5602-6",
  url="https://www.fit.vut.cz/research/publication/11263/"
}
Files
Projects
Algorithms, Design Methods, and Many-Core Execution Platform for Low-Power Massive Data-Rate Video and Image Processing, MŠMT, Společné technologické iniciativy, 7H14002, start: 2014-04-01, end: 2017-06-30, completed
Architektury paralelních a vestavěných počítačových systémů, BUT, Vnitřní projekty VUT, FIT-S-14-2297, start: 2014-01-01, end: 2016-12-31, completed
IT4Innovations excellence in science, MŠMT, Národní program udržitelnosti II, LQ1602, start: 2016-01-01, end: 2020-12-31, completed
Research groups
Dependable Digital Systems Research Group (RG DEPSYS)
Departments
Department of Computer Systems (DCSY)
Back to top