Result Details
A Core Generator for Multi-ALU Processors Utilized in Genetic Parallel Programming
Genetic Parallel Programming (GPP) evolves parallel programs for MIMD architectures with multiple arithmetic/logic processors (MAPs). This paper describes a tool intended for rapid development of GPP applications. A new software tool is proposed which is able to generate a simulator (in C language) of the MAP and a VHDL implementation of the MAP whose structure and parameters are specified in an input xml file. The proposed tool is intended to serve as first version of the core generator for MAPs utilizedin GPP. Typical MAPs are synthetized and their performance is comparedagainst the simulation running on a common PC for a typical task - asymbolic regression.
Genetic parallel programming,
GPP accelerating phenomenon, Multi-ALU Processor, XML, FPGA, VHDL.
@inproceedings{BUT22241,
author="Zbyšek {Gajda}",
title="A Core Generator for Multi-ALU Processors Utilized in Genetic Parallel Programming",
booktitle="Proc. of 2006 IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop",
year="2006",
pages="238--240",
publisher="IEEE Computer Society",
address="Praha",
isbn="1424401844",
url="https://www.fit.vut.cz/research/publication/8038/"
}