Faculty of Information Technology, BUT

Publication Details

An Evolvable Hardware System in Xilinx Virtex II Pro FPGA

VAŠÍČEK Zdeněk and SEKANINA Lukáš. An Evolvable Hardware System in Xilinx Virtex II Pro FPGA. International Journal of Innovative Computing and Applications, vol. 1, no. 1, pp. 63-73. ISSN 1751-648X. Available from: http://dx.doi.org/10.1504/IJICA.2007.013402
Czech title
An Evolvable Hardware System in Xilinx Virtex II Pro FPGA
Type
journal article
Language
english
Authors
URL
Keywords
image filter, evolvable hardware, FPGA
Abstract
In this paper, a new circuit architecture for image filter evolution is proposed. The evolvable system is based on the implementation of a search algorithm in the PowerPC processor which is available in Xilinx Virtex II Pro FPGAs. Candidate filters are evaluated in a domain-specific virtual reconfigurable circuit implemented using a reconfigurable logic of the same FPGA. As the PowerPC processor enables to execute more sophisticated search algorithms than an original solely circuit-based solution, a higher performance can be obtained. In the FPGA, a resulting human-competitive filter can be evolved in 15 seconds in average.  
Published
2007
Pages
63-73
Journal
International Journal of Innovative Computing and Applications, vol. 1, no. 1, ISSN 1751-648X
Publisher
Inderscience Publishers
DOI
BibTeX
@ARTICLE{FITPUB8309,
   author = "Zden\v{e}k Va\v{s}\'{i}\v{c}ek and Luk\'{a}\v{s} Sekanina",
   title = "An Evolvable Hardware System in Xilinx Virtex II Pro FPGA",
   pages = "63--73",
   journal = "International Journal of Innovative Computing and Applications",
   volume = 1,
   number = 1,
   year = 2007,
   ISSN = "1751-648X",
   doi = "10.1504/IJICA.2007.013402",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/8309"
}
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