Faculty of Information Technology, BUT

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Polymorphic Gates in Design and Test of Digital Circuits

SEKANINA Lukáš, STAREČEK Lukáš, KOTÁSEK Zdeněk and GAJDA Zbyšek. Polymorphic Gates in Design and Test of Digital Circuits. International Journal of Unconventional Computing, vol. 4, no. 2, pp. 125-142. ISSN 1548-7199.
Czech title
Polymorfní hradla v návrhu a testování číslicových obvodů
journal article
digital circuit, polymorphic gate, test, adaptation, evolutionary algorithm
Polymorphic gates are unconventional logic components which can switch their logic functions according to changing environment. The first part of this study presents an evolutionary approach to the design of polymorphic modules which exhibit different logic functions in different environments. The most complicated circuit that we evolved contains more than 100 gates. The second part of this study shows how to reduce the number of test vectors of a digital circuit by replacing some of its gates by polymorphic gates. In the first polymorphic mode, the circuit implements the original function. When switched to the second polymorphic mode, it can be tested using fewer test vectors than in the first polymorphic mode; however, the same fault coverage is obtained. The number of test vectors was reduced on 50-91% of its original volume for six benchmark circuits. The paper also discusses various obstacles which one has to deal with during a practical utilization of polymorphic gates.
International Journal of Unconventional Computing, vol. 4, no. 2, ISSN 1548-7199
Old City Publishing, Inc.
   author = "Luk\'{a}\v{s} Sekanina and Luk\'{a}\v{s} Stare\v{c}ek and Zden\v{e}k Kot\'{a}sek and Zby\v{s}ek Gajda",
   title = "Polymorphic Gates in Design and Test of Digital Circuits",
   pages = "125--142",
   journal = "International Journal of Unconventional Computing",
   volume = 4,
   number = 2,
   year = 2008,
   ISSN = "1548-7199",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/8587"
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