Faculty of Information Technology, BUT

Publication Details

Design of Arbiters and Allocators Based on Multi-Terminal BDDs

DVOŘÁK Václav and MIKUŠEK Petr. Design of Arbiters and Allocators Based on Multi-Terminal BDDs. Journal of Universal Computer Science, vol. 16, no. 14, pp. 1826-1852. ISSN 0948-6968.
Czech title
Návrh arbitrů a alokátorů založený na multi-terminálních BDD
Type
journal article
Language
english
Authors
Keywords
Multi-Terminal BDDs, LUT cascades, iterative disjunctive decomposition, arbiter circuits, allocators.
Abstract
Assigning one (more) shared resource(s) to several requesters is a function of arbiters (allocators). This class of decision-making modules can be implemented in a number of ways, from hardware to firmware to software. The paper presents a new computer-aided technique that can produce representations of arbiters/allocators in a form of a Multi-Terminal Binary Decision Diagram (MTBDD) with close to minimum cost and width. This diagram can then serve as a prototype for a cascade of multiple-output look-up tables (LUTs) that implements the given function, or for efficient firmware implementation. The technique makes use of iterative decomposition of integer functions of Boolean variables and a variable-ordering heuristic to order variables. The LUT cascades lead directly to the pipelined design, simplify wiring and testing and can compete with the traditional FPGA design in performance and with PLA design in chip area.
Published
2010
Pages
1826-1852
Journal
Journal of Universal Computer Science, vol. 16, no. 14, ISSN 0948-6968
Publisher
Springer Verlag
BibTeX
@ARTICLE{FITPUB9348,
   author = "V\'{a}clav Dvo\v{r}\'{a}k and Petr Miku\v{s}ek",
   title = "Design of Arbiters and Allocators Based on Multi-Terminal BDDs",
   pages = "1826--1852",
   journal = "Journal of Universal Computer Science",
   volume = 16,
   number = 14,
   year = 2010,
   ISSN = "0948-6968",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/9348"
}
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