Publication Details

Advanced Fault Tolerant Bus for Multicore System Implemented in FPGA

STRAKA Martin, KAŠTIL Jan, NOVOTNÝ Jaroslav and KOTÁSEK Zdeněk. Advanced Fault Tolerant Bus for Multicore System Implemented in FPGA. In: IEEE Design and Diagnostics of Electronic Circuits and Systems DDECS'2011. Cottbus: IEEE Computer Society, 2011, pp. 397-398. ISBN 978-1-4244-9753-9.
Czech title
Odolná sběrnice pro multi-jadrove systémy implementované do FPGA
Type
conference paper
Language
english
Authors
Straka Martin, Ing., Ph.D. (DCSY FIT BUT)
Kaštil Jan, Ing. (DCSY FIT BUT)
Novotný Jaroslav, Ing. (FIT BUT)
Kotásek Zdeněk, doc. Ing., CSc. (DCSY FIT BUT)
Keywords
FPGA, fault tolerant, bus, multicore, reconfiguration, on-line checker, TMR
Abstract
In the paper, a technique for design of highly dependable communication structure in SRAM-based FPGA is presented. The architecture of the multicore system and the structure of fault tolerant bus with cache memories are demonstrated. The fault tolerant properties are achieved by the replication and utilization of the self checking techniques together with partial dynamic reconfiguration. The experimental results show that presented system has small overhead if the high number of function units are used in the dependable system. All experiments were done on the Virtex5 and Virtex6 platform.
Published
2011
Pages
397-398
Proceedings
IEEE Design and Diagnostics of Electronic Circuits and Systems DDECS'2011
Conference
IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems 2011, Cottbus, DE
ISBN
978-1-4244-9753-9
Publisher
IEEE Computer Society
Place
Cottbus, DE
BibTeX
@INPROCEEDINGS{FITPUB9492,
   author = "Martin Straka and Jan Ka\v{s}til and Jaroslav Novotn\'{y} and Zden\v{e}k Kot\'{a}sek",
   title = "Advanced Fault Tolerant Bus for Multicore System Implemented in FPGA",
   pages = "397--398",
   booktitle = "IEEE Design and Diagnostics of Electronic Circuits and Systems DDECS'2011",
   year = 2011,
   location = "Cottbus, DE",
   publisher = "IEEE Computer Society",
   ISBN = "978-1-4244-9753-9",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/9492"
}
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