Evoluční snižování příkonu: Od obvodů na úrovni tranzistorů po neuronové sítě na čipu

The decreasing of power consumption becomes to be very important. The aim of this work is to utilise evolutionary algorithms in order to optimisation of the power consumption of digital circuits. It focus on the application of the algorithms in the real-world problems. Four applications were selected to show the ability of the proposed algorithms to decrease the power. New modules described on the transistor-level were designed, the power consumption of median filters were reduced, the new methods of approximate sorting were shown and the new approach for approximation in neural networks was introduced.