Result Details

Web-Based Simulator of Superscalar RISC-V Processors

JAROŠ, J.; MAJER, M.; HORKÝ, J.; VÁVRA, J. Web-Based Simulator of Superscalar RISC-V Processors. In Proceedings of SC 2024-W: Workshops of the International Conference for High Performance Computing, Networking, Storage and Analysis. Atlanta, GA: Institute of Electrical and Electronics Engineers, 2024. p. 1676-1684. ISBN: 979-8-3503-5554-3.
Type
conference paper
Language
English
Authors
Jaroš Jiří, prof. Ing., Ph.D., DCSY (FIT)
Majer Michal, Ing.
Horký Jakub, Ing.
Vávra Jan, Ing.
Abstract

Mastering computational architectures is essential for developing fast and power-efficient programs. Our advanced simulator empowers both IT students and professionals to  grasp the fundamentals of superscalar RISC-V processors, HW/SW co-design and HPC optimization techniques. With customizable processor and memory architecture, full C compiler support, and detailed runtime statistics, this tool offers a comprehensive learning experience. Enjoy the convenience of a modern, web-based GUI to enhance your understanding and skills.

Keywords

Web-based simulator, RISC-V processor, superscalar processor 

URL
Published
2024
Pages
1676–1684
Proceedings
Proceedings of SC 2024-W: Workshops of the International Conference for High Performance Computing, Networking, Storage and Analysis
Conference
The International Conference for High Performance Computing, Networking, Storage, and Analysis
ISBN
979-8-3503-5554-3
Publisher
Institute of Electrical and Electronics Engineers
Place
Atlanta, GA
DOI
10.1109/SCW63240.2024.00209
EID Scopus
2-s2.0-85217161428
BibTeX 
@inproceedings{BUT192198,
  author="Jiří {Jaroš} and Michal {Majer} and Jakub {Horký} and Jan {Vávra}",
  title="Web-Based Simulator of Superscalar RISC-V Processors",
  booktitle="Proceedings of SC 2024-W: Workshops of the International Conference for High Performance Computing, Networking, Storage and Analysis",
  year="2024",
  pages="1676--1684",
  publisher="Institute of Electrical and Electronics Engineers",
  address="Atlanta, GA",
  doi="10.1109/SCW63240.2024.00209",
  isbn="979-8-3503-5554-3",
  url="https://ieeexplore.ieee.org/document/10820703"
}
Files
Projects
Application-specific HW/SW architectures and their applications, BUT, Vnitřní projekty VUT, FIT-S-23-8141, start: 2023-03-01, end: 2026-02-28, running
Research groups
Supercomputing Technologies Research Group SC@FIT (RG SC@FIT)
Departments
Department of Computer Systems (DCSY)
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