Result Details

An algorithmic A/D switched-current converter for smart signal digitization with self-test features

VRBA, R., VEČEŘA, I. An algorithmic A/D switched-current converter for smart signal digitization with self-test features. MEASUREMENT, 2004, vol. 35, no. 2, 8 p. ISSN: 0263-2241.
Type
journal article
Language
English
Authors
Vrba Radimír, prof. Ing., CSc., UMEL (FEEC)
Večeřa Ivo, Ing.
Abstract

Practical aspects of the implementation of test circuitry into CMOS design of an analogue-to-digital converter are discussed. A design-for-test in switched-current mode circuitry is focused. As an example, analysis of an A/D converter designed in switched-current technique is used for data sampling. The problems concerned with controllability and observability of internal nodes are discussed. A pipelined switched-current A/D converter designed in 0.6 m CMOS technology is described. Current mode enables operation down to 3 V thus is suitable for battery powered applications. The system integrates band-gap reference and independent supervisory circuit with 1% accuracy. Current consumption in sleep mode is less than 1 A. A/D converter is prepared to meet 1452.2 specifications. The models were used to verify theoretical proposals by means of SPICE simulations.

Published
2004
Pages
8
Journal
MEASUREMENT, vol. 35, no. 2, ISSN 0263-2241
BibTeX
@article{BUT41732,
  author="Radimír {Vrba} and Ivo {Večeřa}",
  title="An algorithmic A/D switched-current converter for smart signal digitization with self-test features",
  journal="MEASUREMENT",
  year="2004",
  volume="35",
  number="2",
  pages="8",
  issn="0263-2241"
}
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