Result Details

Measuring Design for Testability Tool Effectiveness by Means of FITTest_BENCH06 Benchmark Circuits

STRNADEL, J.; PEČENKA, T.; KOTÁSEK, Z. Measuring Design for Testability Tool Effectiveness by Means of FITTest_BENCH06 Benchmark Circuits. COMPUTING AND INFORMATICS, 2008, vol. 27, no. 6, p. 913-930. ISSN: 1335-9150.
Type
journal article
Language
English
Authors
Strnadel Josef, Ing., Ph.D., DCSY (FIT)
Pečenka Tomáš, Ing., Ph.D.
Kotásek Zdeněk, doc. Ing., CSc., DCSY (FIT), UTKO (FEEC)
Abstract

Benchmark circuits provide a basis for both research institutions and industry to measure their methods and products against. This paper focus on utilization of
recently published FITTest_BENCH06 benchmarks
for measuring quality of our novel academic design for testability tool called CADeT. The paper presents basic characteristics of benchmarks and CADeT tool, provides results and analysis of implementing individual testing techniques and their constraint-driven combination to particular benchmarks.

Keywords

benchmark, design for testability, register-transfer level, test point insertion, scan design technique

URL
Published
2008
Pages
913–930
Journal
COMPUTING AND INFORMATICS, vol. 27, no. 6, ISSN 1335-9150
BibTeX
@article{BUT48139,
  author="Josef {Strnadel} and Tomáš {Pečenka} and Zdeněk {Kotásek}",
  title="Measuring Design for Testability Tool Effectiveness by Means of FITTest_BENCH06 Benchmark Circuits",
  journal="COMPUTING AND INFORMATICS",
  year="2008",
  volume="27",
  number="6",
  pages="913--930",
  issn="1335-9150",
  url="https://www.fit.vut.cz/research/publication/8400/"
}
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Projects
Optimizing Methods in Digital Systems Diagnosis, GACR, Postdoktorandské granty, GP102/05/P193, start: 2005-01-01, end: 2007-12-31, completed
Security-Oriented Research in Information Technology, MŠMT, Institucionální prostředky SR ČR (např. VZ, VC), MSM0021630528, start: 2007-01-01, end: 2013-12-31, running
Research groups
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