Result Details
Digital Signal Soft-Processor for Audio and Video Processing
PRISTACH, M.; HUSÁR, A.; FUJCIK, L.; HRUŠKA, T.; MASAŘÍK, K. Digital Signal Soft-Processor for Audio and Video Processing. ElectroScope - http://www.electroscope.zcu.cz, 2011, vol. 2011, no. 4, p. 1-5. ISSN: 1802-4564.
Type
journal article
Language
English
Authors
Pristach Marián, Ing., Ph.D.
Husár Adam, Ing., Ph.D., DIFS (FIT)
Fujcik Lukáš, doc. Ing., Ph.D., UMEL (FEEC)
Hruška Tomáš, prof. Ing., CSc., CIS - Director (CIS), DIFS (FIT)
Masařík Karel, Ing., Ph.D., DIFS (FIT)
Husár Adam, Ing., Ph.D., DIFS (FIT)
Fujcik Lukáš, doc. Ing., Ph.D., UMEL (FEEC)
Hruška Tomáš, prof. Ing., CSc., CIS - Director (CIS), DIFS (FIT)
Masařík Karel, Ing., Ph.D., DIFS (FIT)
Abstract
The paper presents a digital signal soft-processor DVSP that was designed using architecture description language ISAC by a tool for processor design called Lissom. First, a basic version of the processor with simple RISC instruction set was designed. Then, based on the target audio and video-processing applications, several instruction set extensions were added. Architecture of the designed processor is described in this paper. Processor was synthesized for several Xilinx FPGAs and synthesis and performance results are presented.
Keywords
architecture description language, digital signal processor, field programmable gate array, hardware/software co-design
Published
2011
Pages
1–5
Journal
ElectroScope - http://www.electroscope.zcu.cz, vol. 2011, no. 4, ISSN 1802-4564
Conference
IMAPS CS International Conference EDS 2012
Publisher
Západočeská univerzita v Plzni
Place
Plzeň
BibTeX
@article{BUT75630,
author="Marián {Pristach} and Adam {Husár} and Lukáš {Fujcik} and Tomáš {Hruška} and Karel {Masařík}",
title="Digital Signal Soft-Processor for Audio and Video Processing",
journal="ElectroScope - http://www.electroscope.zcu.cz",
year="2011",
volume="2011",
number="4",
pages="1--5",
issn="1802-4564"
}
Projects
Security-Oriented Research in Information Technology, MŠMT, Institucionální prostředky SR ČR (např. VZ, VC), MSM0021630528, start: 2007-01-01, end: 2013-12-31, running
System for Programming and Realization of Embedded Systems, MPO, TIP, FR-TI1/038, start: 2009-07-01, end: 2013-06-30, completed
System for Programming and Realization of Embedded Systems, MPO, TIP, FR-TI1/038, start: 2009-07-01, end: 2013-06-30, completed
Departments