Course details

Hardware/Software Codesign (in English)

HSCe Acad. year 2023/2024 Winter semester 5 credits

The course focuses on aspects of system level design. Implementation of HW/SW systems optimized according to various criteria. Behavioural and structural HW/SW system description. Basic hardware and software components and interface models. Hardware and software components synthesis. Assignment of behavioural description to given components. Design of interfaces between HW/SW components. Planning access to distributed components. Prediction and design analysis techniques regarding given constrains. HW/SW partitioning algorithms and tools. Heterogeneous computation architectures and platforms. Integrated design tools. Case studies of optimized HW/SW systems.


Course coordinator

Language of instruction



Credit+Examination (written)

Time span

  • 39 hrs lectures
  • 13 hrs projects

Assessment points

  • 55 pts final exam (written part)
  • 20 pts mid-term test (written part)
  • 25 pts projects



Learning objectives

The aim of the course is to gain knowledge and skills in HW/SW co-design of computing systems. The students will also learn about models of hardware and software component behavior and mutual interaction, hardware and software partitioning algorithms and techniques and assessment of the quality, and the final system synthesis and optimization according to various criteria.
Students will gain knowledge and skill in theory and techniques of automatized HW/SW co-design of computation systems optimized according to various criteria.
Theoretical background for analysis and design of HW/SW systems.

Prerequisite knowledge and skills

Basics of system simulation and design.

Study literature

  • Lecture notes in e-format.

Fundamental literature

  • Schaumont, P. R.: A Practical Introduction to Hardware/Software Codesign, Second Edition, Springer, 2013, ISBN 978-1-4614-3737-6 (eBook).

  • De Micheli, G., Rolf, E., Wolf, W.: Readings in Hardware/Software Co-design, Morgan Kaufmann; 1. vydání, 2001, 697 s., ISBN: 1558607021.

  • L. H. Crockett, R. A. Elliot, M. A. Enderwitz and R. W. Stewart: The Zynq Book: Embedded Processing with the ARM CortexA9 on the Xilinx Zynq-7000 All Programmable SoC, First Edition, Strathclyde Academic Media, 2014.
  • D. D. Gajski, N. D. Dutt, A. C-H Wu, S. Y-L Lin: High-Level Synthesis: Introduction to Chip and System Design, Springer, 1992, ISBN-13: 978-0792391944.
  • M. Fingeroff: High-Level Synthesis Blue Book, Xlibris US, 2010, ISBN ‎ 1450097243.

Syllabus of lectures

  • System-level design methodology for embedded systems.
  • Heterogeneous computation structures, architectures and platforms.
  • Behavioral and structural HW/SW system description.
  • System-level synthesis - allocation, binding and scheduling.
  • HW structures synthesis and optimization.
  • Partitioning algorithms and tools.
  • System-level optimization.
  • Languages for HW/SW system description.
  • CAD tools for HW/SW codesign.
  • Inter-component interfaces and communication.
  • Design estimation and analysis techniques.
  • Low-power design techniques.

Syllabus - others, projects and individual work of students

Individual thirteen-hour project.

Progress assessment

  • Mid-term exam - 20 points. 
  • Project - 25 points. For receiving the credit and thus for entering the exam, students have to obtain at least 5 points from the project. 
  • Final exam - 55 points. The minimal number of points, which can be obtained from the final exam, is 25. Otherwise, no points will be assigned to a student.
  • Plagiarism and not allowed cooperation will cause that involved students are not classified and disciplinary action can be initiated. 



Exam prerequisites



Mon exam 2024-01-22 E105 16:0017:30 2. opravný termín
Tue exam 2024-01-16 A113 10:0011:30 1. opravný termín
Wed exam 2023-10-25 E104 08:0009:30 HSC - Hardware/Software Codesign
Wed lecture 1., 2., 6., 11., 13. of lectures E104 08:0010:5070 1EIT 2EIT INTE MGMe xx Fučík
Wed lecture 3., 12. of lectures E104 08:0010:5070 1EIT 2EIT INTE MGMe xx Kekely
Wed lecture 4., 5., 7., 8., 9., 10. of lectures E104 08:0010:5070 1EIT 2EIT INTE MGMe xx Martínek
Fri exam 2024-01-05 E104 12:0013:30 řádná

Course inclusion in study plans

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