Thesis Details
Zamezení výpočetního přetížení počítačového systému v důsledku přerušení
The master thesis deals with the techniques to prevent computer system from computational overloading due to excessive frequency of interruptions. The goal is to document the effect of interupts on a selected computing platform containing the ARM Cortex-M4 processor core. The work describes and implements possible software techniques that reduce the impact of consequences of overload due to excessive interruption frequency. At the same time the work verifies and compares the effectiveness of the particular implemented techniques by appropriate set of experiments.
Interrupt service routine, Interrupt subsystem, Interrupt latency, Interrupt vector, Strict software scheduler, Bursty software scheduler, FITkit 3.0 Minerva, ARM Cortex-M4, Nested vector interrupt controller, Data WatchPoint and Trace unit, Kinetis Design Studio
Jaroš Jiří, doc. Ing., Ph.D. (DCSY FIT BUT), člen
Martínek Tomáš, doc. Ing., Ph.D. (DCSY FIT BUT), člen
Vašíček Zdeněk, doc. Ing., Ph.D. (DCSY FIT BUT), člen
Vojnar Tomáš, prof. Ing., Ph.D. (DITS FIT BUT), člen
Vranić Valentino, doc. Ing., Ph.D. (FIIT STU), člen
@mastersthesis{FITMT13122, author = "Tom\'{a}\v{s} Hajd\'{i}k", type = "Master's thesis", title = "Zamezen\'{i} v\'{y}po\v{c}etn\'{i}ho p\v{r}et\'{i}\v{z}en\'{i} po\v{c}\'{i}ta\v{c}ov\'{e}ho syst\'{e}mu v d\r{u}sledku p\v{r}eru\v{s}en\'{i}", school = "Brno University of Technology, Faculty of Information Technology", year = 2019, location = "Brno, CZ", language = "czech", url = "https://www.fit.vut.cz/study/thesis/13122/" }