Thesis Details

Procesní jednotka pro analýzu a editaci síťového provozu v FPGA

Master's Thesis Student: Pazdera Jan Academic Year: 2006/2007 Supervisor: Martínek Tomáš, doc. Ing., Ph.D.
English title
Processing Unit for Analysis and Modification of Network Traffic
Language
Czech
Abstract

This paper deals with the design and implementation of the Processing Unit for Analysis and Modification of Network Traffic. The proposed unit is intended to analyse an incoming network traffic and perform packet header editations to provide the proper packet delivery. The designed architecture has the following characteristics. It is based on the stream processor concept which allows to process independent stream elements (i.e. packets) in parallel. Multiply stream clients can be used to process the same stream data concurrently. The stream clients can be driven either autonomously or by program. The packets are processed according to the incoming metadata and transmited to the output. The Processing Unit has been implemented in VHDL language. The target technology is Field Programmable Gate Array (FPGA).

Keywords

Stream processor, Liberouter, Ethernet, IPv4, IPv6, FPGA, VHDL

Department
Department of Computer Systems FIT BUT
Degree Programme
Information Technology, Field of Study Computer Systems and Networks
Files
Status
defended, grade A
Date
19 June 2007
Reviewer
Kořenek Jan, doc. Ing., Ph.D.
Committee
Dvořák Václav, prof. Ing., DrSc. (DCSY FIT BUT), předseda
Janoušek Vladimír, doc. Ing., Ph.D. (DITS FIT BUT), člen
Kotásek Zdeněk, doc. Ing., CSc. (DCSY FIT BUT), člen
Krejčíček Jaromír, prof. Ing., CSc. (UNOB), člen
Křena Bohuslav, Ing., Ph.D. (DITS FIT BUT), člen
Matoušek Petr, doc. Ing., Ph.D., M.A. (DIFS FIT BUT), člen
Citation
PAZDERA, Jan. Procesní jednotka pro analýzu a editaci síťového provozu v FPGA. Brno, 2007. Master's Thesis. Brno University of Technology, Faculty of Information Technology. 2007-06-19. Supervised by Martínek Tomáš. Available from: https://www.fit.vut.cz/study/thesis/4741/
BibTeX 
@mastersthesis{FITMT4741,
    author = "Jan Pazdera",
    type = "Master's thesis",
    title = "Procesn\'{i} jednotka pro anal\'{y}zu a editaci s\'{i}\v{t}ov\'{e}ho provozu v FPGA",
    school = "Brno University of Technology, Faculty of Information Technology",
    year = 2007,
    location = "Brno, CZ",
    language = "czech",
    url = "https://www.fit.vut.cz/study/thesis/4741/"
}

Theses

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