Faculty of Information Technology, BUT

Product Details

Translator of VHDL Design to Counter Automaton

Created: 2007

Czech title
Překladač VHDL designu do čítačového automatu
Type
software
License
required - free
Authors
Keywords
VHDL, counter automata, translator, model, formal verification
Description
The VHD2CA is the translator of a hardware desing in VHDL to a counter automaton. Some of modern tools for formal verification uses the counter automaton as the formalism for the description of an infinite state space model, thus the translation from VHDL to counter automaton allows the user to formal verify generic (parametric) hardware systems. The translator includes the whole LALR(1) grammar of VHDL'93 language and supports common used constructs.
Location
Licence
Free software under the terms of GNU GPL (cf. http://www.gnu.org/licenses/gpl.html).
Files
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