Faculty of Information Technology, BUT

Publication Details

Packet Processing on FPGA SoC with DPDK

KOŘENEK Jan and VIKTORIN Jan. Packet Processing on FPGA SoC with DPDK. In: 26th International Conference on Field-Programmable Logic and Applications. Lausanne: École Polytechnique Fédérale de Lausanne, 2016, pp. 578-579. ISBN 978-2-8399-1844-2. Available from: http://ieeexplore.ieee.org/document/7577395/
Czech title
Zpracování paketů na platformách FPGA SoC v prostředí DPDK
Type
conference paper
Language
english
Authors
Kořenek Jan, doc. Ing., Ph.D. (DCSY FIT BUT)
Viktorin Jan, Ing. (DCSY FIT BUT)
URL
Keywords
DPDK, FPGA, SoC, ARM, packet processing
Abstract
One of the most important topics of today is a packet processing in data centers with respect to the power consumption and efficient utilization of computational resources. The ARM architecture has proved to be an energy efficient computational system. Together with an integrated FPGA on a single die, it offers potentially a high performance with respect to the power consumption. DPDK - a set of libraries and drivers intended primarily for fast packet processing - is becoming to be a standard approach for packet processing, especially in data centers. In this paper, we exploit the potential of packet processing based on DPDK and FPGA SoC architectures. Especially, we aim at the potential of utilizing the ARM Cortex-A9 and Cortex-A53 CPUs.
Annotation
One of the most important topics of today is a data processing in data centers with respect to a low-power consumption and efficient utilization of computational resources. For such purposes, solutions with integrated FPGAs like the Xilinx Zynq and ZynqMP can be used. After few years of existance of such platforms, there is still no standard way of data processing on such platforms. The lack of a standard API for those purposes can be solved by utilizing the DPDK library intended for fast access to the hardware. This paper introduces a potential of utilizing the DPDK on Zynq and ZynqMP-bases systems.
Published
2016
Pages
578-579
Proceedings
26th International Conference on Field-Programmable Logic and Applications
Conference
26th International Conference on Field-programmable Logic and Applications, Lausanne, CH
ISBN
978-2-8399-1844-2
Publisher
École Polytechnique Fédérale de Lausanne
Place
Lausanne, CH
DOI
BibTeX
@INPROCEEDINGS{FITPUB11173,
   author = "Jan Ko\v{r}enek and Jan Viktorin",
   title = "Packet Processing on FPGA SoC with DPDK",
   pages = "578--579",
   booktitle = "26th International Conference on Field-Programmable Logic and Applications",
   year = 2016,
   location = "Lausanne, CH",
   publisher = "\'{E}cole Polytechnique F\'{e}d\'{e}rale de Lausanne",
   ISBN = "978-2-8399-1844-2",
   doi = "10.1109/FPL.2016.7577395",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/11173"
}
Back to top