Faculty of Information Technology, BUT

Publication Details

HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware

ZACHARIÁŠOVÁ Marcela, LENGÁL Ondřej and KAJAN Michal. HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware. Lecture Notes in Computer Science, vol. 2012, no. 7261, pp. 247-253. ISSN 0302-9743.
Czech title
HAVEN: Otevřený rámec pro akceleraci funkcionální verifikace hardwaru za pomoci FPGA
Type
journal article
Language
english
Authors
Keywords
functional verification, testbench, SystemVerilog, hardware acceleration, FPGA
Abstract
Functional verification is a widespread technique to check whether a hardware system satisfies a given correctness specification. As the complexity of modern hardware systems rises rapidly, it is a challenging task to find appropriate techniques for acceleration of this process. In this paper we present HAVEN, a freely available open functional verification framework that exploits the field-programmable gate array (FPGA) technology for cycle-accurate acceleration of simulation-based verification runs. HAVEN takes advantage of the inherent parallelism of hardware systems and moves the verified system together with transaction-based interface components of the functional verification environment from software into an FPGA. The presented framework is written in SystemVerilog and complies with the principles of functional verification methodologies (OVM, UVM), assertion-based verification, and also provides adequate debugging visibility, making its application range quite large. Our experiments confirm the assumption that the achieved acceleration is proportional to the complexity of the verified system.

Published
2012
Pages
247-253
Journal
Lecture Notes in Computer Science, vol. 2012, no. 7261, ISSN 0302-9743
Book
Proceedings of HVC'11
Publisher
Springer Verlag
Place
Berlin, DE
BibTeX
@ARTICLE{FITPUB9738,
   author = "Marcela Zachari\'{a}\v{s}ov\'{a} and Ond\v{r}ej Leng\'{a}l and Michal Kajan",
   title = "HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware",
   pages = "247--253",
   booktitle = "Proceedings of HVC'11",
   journal = "Lecture Notes in Computer Science",
   volume = 2012,
   number = 7261,
   year = 2012,
   location = "Berlin, DE",
   publisher = "Springer Verlag",
   ISSN = "0302-9743",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/9738"
}
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