Result Details

Reconfigurable Image Processing Architecture

ZEMČÍK, P.; HEROUT, A.; BERAN, V.; SCHIER, J.; FUČÍK, O. Reconfigurable Image Processing Architecture. Proceedings of GVIP2005. Proceedings of GVIP 2005. Cairo: 2005. p. 1-6. ISSN: 1687-398X.
Type
conference paper
Language
English
Authors
Zemčík Pavel, prof. Dr. Ing., dr. h. c., DCGM (FIT)
Herout Adam, prof. Ing., Ph.D., DCGM (FIT)
Beran Vítězslav, doc. Ing., Ph.D., FIT (FIT), DCGM (FIT)
Schier Jan, Dr. Ing.
Fučík Otto, doc. Dr. Ing., DCSY (FIT)
Abstract

The paper is focused on architectures for image processing on reconfigurable architectures based on DSP and FPGA circuits. Main focus is on main principles and methods of reconfiguration.

Keywords

image processing, configurable hardware, FPGA, digital signal processing, DSP

Published
2005
Pages
1–6
Journal
Proceedings of GVIP 2005, ISSN 1687-398X
Proceedings
Proceedings of GVIP2005
Conference
International Conference on Graphics, Vision and Image Processing
Place
Cairo
BibTeX 
@inproceedings{BUT21487,
  author="Pavel {Zemčík} and Adam {Herout} and Vítězslav {Beran} and Jan {Schier} and Otto {Fučík}",
  title="Reconfigurable Image Processing Architecture",
  booktitle="Proceedings of GVIP2005",
  year="2005",
  journal="Proceedings of GVIP 2005",
  pages="1--6",
  address="Cairo",
  issn="1687-398X"
}
Projects
Rapid prototyping tools for development of HW-accelerated embedded image- and video-processing applications, AV ČR, Informační společnost (Národní program výzkumu), 1ET400750408, start: 2004-07-01, end: 2008-12-31, completed
Research groups
Computer Graphics Research Group (RG GRAPH)
Image and Video Processing Research Group (RG VIDEO)
Reconfigurable Architecture Research Group (RG FPGA)
Departments
Department of Computer Graphics and Multimedia (DCGM)
Department of Computer Systems (DCSY)
Back to top