Result Details

A 12-bit, Low Power Switched-Capacitor Pipelined ADC, A Case Study

HÁZE, J.; VRBA, R.; SKOČDOPOLE, M.; FUJCIK, L. A 12-bit, Low Power Switched-Capacitor Pipelined ADC, A Case Study. In Proceedings of 11th International Conference Electronic Devices and Systems EDS 2004. Brno: Czech Republic, 2004. 5 p. ISBN: 80-214-2701-9.
Type
conference paper
Language
English
Authors
Háze Jiří, doc. Ing., Ph.D., UMEL (FEEC)
Vrba Radimír, prof. Ing., CSc., UMEL (FEEC)
Skočdopole Michal, Ing., UMEL (FEEC)
Fujcik Lukáš, doc. Ing., Ph.D., UMEL (FEEC)
Abstract

The paper describes a case study of new 12 bit, low power switched-capacitor (SC) ADC for portable applications. The paper is focused on block design of ADC and its behavioral modeling regarding low power consumption. The basic blocks topology design is outlined as well. The cancellation techniques for avoiding of capacitor mismatch, clock feedthrough, finite gain and offset of opamp etc. is utilized in the design.

Keywords

Pipelined ADC, switched-capacitor technique, portable application, error correction scheme

Published
2004
Pages
5
Proceedings
Proceedings of 11th International Conference Electronic Devices and Systems EDS 2004
Edition
1
Conference
The 11th Electronic Devices and Systems Conference
ISBN
80-214-2701-9
Publisher
Czech Republic
Place
Brno
BibTeX 
@inproceedings{BUT11374,
  author="Jiří {Háze} and Radimír {Vrba} and Michal {Skočdopole} and Lukáš {Fujcik}",
  title="A 12-bit, Low Power Switched-Capacitor Pipelined ADC, A Case Study",
  booktitle="Proceedings of 11th International Conference Electronic Devices and Systems EDS 2004",
  year="2004",
  number="1",
  pages="5",
  publisher="Czech Republic",
  address="Brno",
  isbn="80-214-2701-9"
}
Departments
Department of Microelectronics (UMEL)
Back to top