Detail výsledku

A 12-bit, Low Power Switched-Capacitor Pipelined ADC, A Case Study

HÁZE, J.; VRBA, R.; SKOČDOPOLE, M.; FUJCIK, L. A 12-bit, Low Power Switched-Capacitor Pipelined ADC, A Case Study. In Proceedings of 11th International Conference Electronic Devices and Systems EDS 2004. Brno: Czech Republic, 2004. 5 p. ISBN: 80-214-2701-9.
Typ
článek ve sborníku konference
Jazyk
anglicky
Autoři
Háze Jiří, doc. Ing., Ph.D., UMEL (FEKT)
Vrba Radimír, prof. Ing., CSc., UMEL (FEKT)
Skočdopole Michal, Ing., UMEL (FEKT)
Fujcik Lukáš, doc. Ing., Ph.D., UMEL (FEKT)
Abstrakt

The paper describes a case study of new 12 bit, low power switched-capacitor (SC) ADC for portable applications. The paper is focused on block design of ADC and its behavioral modeling regarding low power consumption. The basic blocks topology design is outlined as well. The cancellation techniques for avoiding of capacitor mismatch, clock feedthrough, finite gain and offset of opamp etc. is utilized in the design.

Klíčová slova

Pipelined ADC, switched-capacitor technique, portable application, error correction scheme

Rok
2004
Strany
5
Sborník
Proceedings of 11th International Conference Electronic Devices and Systems EDS 2004
Vydání
1
Konference
The 11th Electronic Devices and Systems Conference
ISBN
80-214-2701-9
Vydavatel
Czech Republic
Místo
Brno
BibTeX
@inproceedings{BUT11374,
  author="Jiří {Háze} and Radimír {Vrba} and Michal {Skočdopole} and Lukáš {Fujcik}",
  title="A 12-bit, Low Power Switched-Capacitor Pipelined ADC, A Case Study",
  booktitle="Proceedings of 11th International Conference Electronic Devices and Systems EDS 2004",
  year="2004",
  number="1",
  pages="5",
  publisher="Czech Republic",
  address="Brno",
  isbn="80-214-2701-9"
}
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