Advanced Digital Systems
PCS Acad. year 2022/2023 Winter semester 5 credits
This course is aimed at teaching advanced techniques of digital circuit design. Firstly, it presents a brief overview of basic approaches to modelling and simulation of digital circuits using the VHDL language and summarizes key properties of target technologies, such as ASIC and FPGA. Next, the course introduces advanced techniques of digital circuits minimization and synthesis (pipelining, retiming), which are supplemented by the application of constraints. The main part of the course is focused on modern approaches to the synthesis of digital circuits. This includes models and methods used for optimisation at logical level and with respect to target technology as well as approaches that build on synergy between synthesis and verification of digital circuits. Apart from these main topics, the course also touches some additional topics like low-power design and the verification of digital circuits based on the OVM methodology.
Language of instruction
- 26 hrs lectures
- 10 hrs pc labs
- 16 hrs projects
- 60 pts final exam (written part)
- 18 pts mid-term test (written part)
- 10 pts labs
- 12 pts projects
Subject specific learning outcomes and competences
The students are able to design complex constrained digital systems using contemporary design techniques and they know modern methods for synthesis and verification of these systems.
To give the students the knowledge of advanced digital systems design including hardware description languages, professional CAD tools, techniques for constrained design, and PLD technology.
Why is the course taught
Design of real digital circuits often requires advanced knowledge, such as a deeper understanding of the synthesis process and its result, power-aware digital design, appropriate setting of constraints or functional verification. The goal of this course is to familiarize a student with these techniques and prepare him/her for a future profession in this area.
Prerequisite knowledge and skills
Digital system design, basic programming skills.
- Přednáškové materiály v elektronické podobě.
- Khatri S. P., Gulati K. (eds.): Advanced Techniques in Logic Synthesis, Optimizations and Applications, ISBN 978-1-4419-7517-1, 2011
- Rabaey J., Pedram M.: Low Power Design Methodologies, Kluwer, ISBN 0792396308, 1996
- Gajsky D., Dutt N., Wu A., Lin S.: High-Level Synthesis: Introduction to Chip and System Design, ISBN 079239194-2, 1992
- Micheli G., High-Level Synthesis from Algorithm to Digital Circuit, ISBN 978-1-4020-8587-1, 2008
Syllabus of lectures
- Combinatorial and sequential logic design techniques, algorithms, and tools review.
- Review of digital design target technologies (ASIC, FPGA).
- Algorithms for minimization of digital circuits.
- Advanced synthesis techniques (pipelining, retiming).
- Constraint conditions.
- Models and methods for modern synthesis of digital circuits (AIG, BDD, SAT solvers).
- Modern synthesis of digital circuits (logic optimization).
- Modern synthesis of digital circuits (optimization for target technology).
- Synergy between synthesis and verification of digital circuits.
- Low power design methodologies.
- Development tools for FPGA and SoC.
- Verification of digital circuits (OVM methodology).
Syllabus of computer exercises
- Synthesis of the basic logic circuits, pipelining, retiming.
- Constraint conditions.
- Synthesis of basic digital circuits using ABC tool.
- Synthesis of advanced digital circuits using ABC tool.
- Verification of digital circuits.
Syllabus - others, projects and individual work of students
- Individual project focused on synthesis of digital circuits.
Written mid-term exam and project in due dates.
Presence in any form of instruction is not compulsory. An absence (and hence loss of points) can be compensated in the following ways:
- presence in another laboratory group dealing with the same task.
- showing a summary of results to the tutor at the next lab.
- sending a short report (summarizing the results of the missed lab and answering the questions from the assignment) to the tutor, in 14 days after the missed lab.
Requirements for class accreditation are not defined.
|Wed||exam||2022-11-16||M104 M105||12:00||13:00||Půlsemestrální zkouška|
|Wed||lecture||1., 3., 11., 13. of lectures||M104 M105||12:00||13:50||9999||1MIT 2MIT||NEMB xx||Kořenek|
|Wed||lecture||4., 5., 6., 7., 8. of lectures||M104 M105||12:00||13:50||9999||1MIT 2MIT||NEMB xx||Matoušek|
|Wed||lecture||2022-11-16||M104 M105||12:00||13:50||9999||1MIT 2MIT||NEMB xx||Kořenek, Matoušek|
|Wed||lecture||2022-11-23||M104 M105||12:00||13:50||9999||1MIT 2MIT||NEMB xx||Zachariášová|
|Wed||lecture||2022-12-07||M104 M105||12:00||13:50||9999||1MIT 2MIT||NEMB xx||Kekely|
|Fri||comp.lab||3., 4. of lectures||N103 N104 N105||08:00||09:50||9999||1MIT 2MIT||xx||Kekely|
|Fri||comp.lab||7., 8. of lectures||N103 N104 N105||08:00||09:50||9999||1MIT 2MIT||xx||Matoušek|
|Fri||comp.lab||2022-11-25||N103 N104 N105||08:00||09:50||9999||1MIT 2MIT||xx||Zachariášová|
Course inclusion in study plans
- Programme IT-MGR-2, field MBI, MGM, any year of study, Compulsory-Elective group C
- Programme IT-MGR-2, field MBS, MIN, MIS, MMM, MSK, any year of study, Elective
- Programme IT-MGR-2, field MPV, 2nd year of study, Compulsory
- Programme MITAI, field NADE, NBIO, NCPS, NGRI, NHPC, NIDE, NISD, NISY, NISY up to 2020/21, NMAL, NMAT, NNET, NSEC, NSEN, NSPE, NVER, NVIZ, any year of study, Elective
- Programme MITAI, field NEMB, NEMB up to 2021/22, any year of study, Compulsory