Thesis Details
Hardware acceleration of object detection in images
Nowadays, an increasing number of cameras and surveillance systems can be observed. The amount of information that these devices produce is enormous, and it is not in human power to process it all, therefore using computing power is needed.Modern computer vision algorithms, especially object detection, already achieve excellent results. One of the disadvantages of current vision algorithms is high computational complexity. Therefore, it is desired to implement these algorithms into a suitable device with better performance to power ratio. FPGA represents a reliable option due to its parallel and power-efficient computing.This dissertation aims to propose methods for optimising the object detector in an image running on an FPGA. These detectors use boosted soft cascades of classifiers with local image feature like weak classifiers. The proposed detectors use sequential evaluation of weak classifiers. More positions in the image are evaluated in parallel to increase the detection performance. Also, a new approach for multiscale object detection is proposed; its advantage is no need for external memory. The new detectors were experimentally verified on the tasks of detecting faces and license plates. The results outperform the current state-of-the-art, allow to create object detectors with higher detection performance, better power to resources ratio and better detection accuracy.
Object Detection, AdaBoost, WaldBoost, Acceleration, FPGA
@phdthesis{FITPT555,
author = "Petr Musil",
type = "Ph.D. thesis",
title = "Hardware acceleration of object detection in images",
school = "Brno University of Technology, Faculty of Information Technology",
year = 2022,
location = "Brno, CZ",
language = "english",
url = "https://www.fit.vut.cz/study/phd-thesis/555/"
}