Thesis Details

Měření parametrů komunikace přes PCI Express

Bachelor's Thesis Student: Matějka Martin Academic Year: 2021/2022 Supervisor: Matoušek Jiří, Ing., Ph.D.
English title
Measuring Parameters of Communication over PCI Express
Language
Czech
Abstract

This bachelor thesis describes designing a unit capable of measuring throughput on a PCI Express bus. The described unit is designed for an FPGA chip on an acceleration card with PCI Express 3.0 interface. At the same time, the thesis describes software implemented in C language used for its control. In the last section of this bachelor thesis are experiments conducted with the designed and implemented unit.

Keywords

PCI Express 3.0, VHDL, throughput measurement, bus, maximum payload size, maximum read request size, relaxed ordering

Department
Degree Programme
Files
Status
defended, grade C
Date
14 June 2022
Reviewer
Committee
Sekanina Lukáš, prof. Ing., Ph.D. (DCSY FIT BUT), předseda
Hradiš Michal, Ing., Ph.D. (DCGM FIT BUT), člen
Jaroš Jiří, doc. Ing., Ph.D. (DCSY FIT BUT), člen
Křivka Zbyněk, Ing., Ph.D. (DIFS FIT BUT), člen
Lengál Ondřej, Ing., Ph.D. (DITS FIT BUT), člen
Citation
MATĚJKA, Martin. Měření parametrů komunikace přes PCI Express. Brno, 2022. Bachelor's Thesis. Brno University of Technology, Faculty of Information Technology. 2022-06-14. Supervised by Matoušek Jiří. Available from: https://www.fit.vut.cz/study/thesis/21631/
BibTeX
@bachelorsthesis{FITBT21631,
    author = "Martin Mat\v{e}jka",
    type = "Bachelor's thesis",
    title = "M\v{e}\v{r}en\'{i} parametr\r{u} komunikace p\v{r}es PCI Express",
    school = "Brno University of Technology, Faculty of Information Technology",
    year = 2022,
    location = "Brno, CZ",
    language = "czech",
    url = "https://www.fit.vut.cz/study/thesis/21631/"
}
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