Thesis Details

Webový simulátor procesoru architektury MIPS

Bachelor's Thesis Student: Hůlek Matěj Academic Year: 2021/2022 Supervisor: Vašíček Zdeněk, doc. Ing., Ph.D.
English title
Web-Based MIPS Simulator
Language
Czech
Abstract

The work deals with the simulation of a pipelined processor of the MIPS architecture in order to demonstrate the activity of the processor at the level of a pipeline for teaching purposes. The aim of this work is to implement a web application that will allow the userto enter the code of symbolic instructions and demonstrate the operation of the simulation core in a suitable way.

Keywords

MIPS architecture, web simulator, instruction processing, pipelining

Department
Degree Programme
Files
Status
defended, grade C
Date
16 June 2022
Reviewer
Committee
Kolář Dušan, doc. Dr. Ing. (DIFS FIT BUT), předseda
Chudý Peter, doc. Ing., Ph.D. MBA (DCGM FIT BUT), člen
Kekely Lukáš, Ing., Ph.D. (DCSY FIT BUT), člen
Lengál Ondřej, Ing., Ph.D. (DITS FIT BUT), člen
Rychlý Marek, RNDr., Ph.D. (DIFS FIT BUT), člen
Citation
HŮLEK, Matěj. Webový simulátor procesoru architektury MIPS. Brno, 2022. Bachelor's Thesis. Brno University of Technology, Faculty of Information Technology. 2022-06-16. Supervised by Vašíček Zdeněk. Available from: https://www.fit.vut.cz/study/thesis/24967/
BibTeX
@bachelorsthesis{FITBT24967,
    author = "Mat\v{e}j H\r{u}lek",
    type = "Bachelor's thesis",
    title = "Webov\'{y} simul\'{a}tor procesoru architektury MIPS",
    school = "Brno University of Technology, Faculty of Information Technology",
    year = 2022,
    location = "Brno, CZ",
    language = "czech",
    url = "https://www.fit.vut.cz/study/thesis/24967/"
}
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