Automated Analysis and Verification Research Group - VeriFIT

Researchers

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Češka Milan, prof. RNDr., CSc.

researcher, DITS FIT BUT

  • Formal Languages Theory
  • Formal Specifications
  • Petri Nets Theory
  • System Modelling and Simulation
[photo]

Holík Lukáš, Mgr., Ph.D.

researcher, DITS FIT BUT

  • Generally logic, automata, formal verification and analysis of computing systems. More specifically:
  • Efficient algorithms for finite automata
  • Verification of pointer programs
  • Verification of string manipulating programs
  • Verification of parallel systems
  • Decision procedures for logics (related to the above points)
Here is my DBLP.
[photo]

Hruška Martin, Ing.

researcher, DITS FIT BUT

  • Formal verification and program analysis
[photo]

Peringer Petr, Dr. Ing.

researcher, DITS FIT BUT

  • Modelling and Simulation
  • Program Verification (symbolic execution,  ...)
  • Object-oriented programming, Design patterns
  • C and C++ programming languages
[photo]

Smrčka Aleš, Ing., Ph.D.

researcher, DITS FIT BUT

  • Testos - Test Tool Set
  • HADES - Hazard detection system (for microprocessors)
  • CDCreloaded - A framework for formal verification of clock-domain-crossing.
  • fast2armc - FAST to ARMC translator
  • vhd2ca - VHDL translator to counter automata
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