Detail výsledku

Regular Expression Matching with Pipelined Delayed Input DFAs for High-speed Networks

MATOUŠEK, D.; KUBIŠ, J.; MATOUŠEK, J.; KOŘENEK, J. Regular Expression Matching with Pipelined Delayed Input DFAs for High-speed Networks. In ANCS 2018 - Proceedings of the 2018 Symposium on Architectures for Networking and Communications Systems. Ithaca, NY: Association for Computing Machinery, 2018. p. 104-110. ISBN: 978-1-4503-5902-3.
Typ
článek ve sborníku konference
Jazyk
anglicky
Autoři
Matoušek Denis, Ing., UPSY (FIT)
Kubiš Juraj, Ing.
Matoušek Jiří, Ing., Ph.D., UPSY (FIT)
Kořenek Jan, doc. Ing., Ph.D., UPSY (FIT)
Abstrakt

Regular expression matching (RE matching) is a widely used operation in network security monitoring applications. With the speed of network links increasing to 100 Gbps and 400 Gbps, it is necessary to speed up packet processing and provide RE matching at such high speeds. Although many RE matching algorithms and architectures have been designed, none of them supports 100 Gbps throughput together with fast updates of an RE set. Therefore, this paper focuses on the design of a new hardware architecture that addresses both these requirements. The proposed architecture uses multiple highly memory-efficient Delayed Input DFAs (D2FAs), which are organized to a processing pipeline. As all D2FAs in the pipeline have only local communication, the proposed architecture is able to operate at high frequency even for a large number of parallel engines, which allows scaling throughput to hundreds of gigabits per second. The paper also analyses how to scale the number of engines and the capacity of buffers to achieve desired throughput. Using the parameters obtained while matching two sets of REs (represented by D2FAs) in a real network traffic, the architecture can be tuned for wire-speed throughput of 400 Gbps.

Klíčová slova

Regular expression matching, 100 Gbps, 400 Gbps, Delayed Input DFA, Pipelined automata

Rok
2018
Strany
104–110
Sborník
ANCS 2018 - Proceedings of the 2018 Symposium on Architectures for Networking and Communications Systems
Konference
14th ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS '18)
ISBN
978-1-4503-5902-3
Vydavatel
Association for Computing Machinery
Místo
Ithaca, NY
DOI
UT WoS
000474465600010
EID Scopus
BibTeX
@inproceedings{BUT155036,
  author="Denis {Matoušek} and Juraj {Kubiš} and Jiří {Matoušek} and Jan {Kořenek}",
  title="Regular Expression Matching with Pipelined Delayed Input DFAs for High-speed Networks",
  booktitle="ANCS 2018 - Proceedings of the 2018 Symposium on Architectures for Networking and Communications Systems",
  year="2018",
  pages="104--110",
  publisher="Association for Computing Machinery",
  address="Ithaca, NY",
  doi="10.1145/3230718.3230730",
  isbn="978-1-4503-5902-3",
  url="https://www.fit.vut.cz/research/publication/11711/"
}
Soubory
Projekty
IT4Innovations excellence in science, MŠMT, Národní program udržitelnosti II, LQ1602, zahájení: 2016-01-01, ukončení: 2020-12-31, ukončen
Pokročilé paralelní a vestavěné počítačové systémy, VUT, Vnitřní projekty VUT, FIT-S-17-3994, zahájení: 2017-03-01, ukončení: 2020-02-29, ukončen
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