Detail publikace

Optimizing Packet Classification on FPGA

KEKELY Michal a KOŘENEK Jan. Optimizing Packet Classification on FPGA. In: PROCEEDINGS 2023 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS). Tallinn: Institute of Electrical and Electronics Engineers, 2023, s. 7-12. ISBN 979-8-3503-3277-3. ISSN 2334-3133. Dostupné z: https://ieeexplore.ieee.org/document/10139668
Název česky
Optimalizace klasifikace paketu v FPGA
Typ
článek ve sborníku konference
Jazyk
angličtina
Autoři
Kekely Michal, Ing. (UPSY FIT VUT)
Kořenek Jan, doc. Ing., Ph.D. (UPSY FIT VUT)
URL
Klíčová slova

FPGA, klasifikace paketu, DCFL, optimalizace

Rok
2023
Strany
7-12
Časopis
IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, ISSN 2334-3133
Sborník
PROCEEDINGS 2023 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)
Konference
International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Tallinn, EE
ISBN
979-8-3503-3277-3
Vydavatel
Institute of Electrical and Electronics Engineers
Místo
Tallinn, EE
DOI
10.1109/DDECS57882.2023.10139668
UT WoS
001012062000002
BibTeX 
@INPROCEEDINGS{FITPUB12805,
   author = "Michal Kekely and Jan Ko\v{r}enek",
   title = "Optimizing Packet Classification on FPGA",
   pages = "7--12",
   booktitle = "PROCEEDINGS 2023 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)",
   journal = "IEEE International Symposium on Design and Diagnostics of Electronic Circuits \& Systems",
   year = 2023,
   location = "Tallinn, EE",
   publisher = "Institute of Electrical and Electronics Engineers",
   ISBN = "979-8-3503-3277-3",
   ISSN = "2334-3133",
   doi = "10.1109/DDECS57882.2023.10139668",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/12805"
}
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