Detail výsledku

Accelerating Quantum Circuit Simulation with Symbolic Execution and Loop Summarization

JOBRANOVÁ, S.; LENGÁL, O.; CHEN, Y.; CHEN, T.; JIANG, J. Accelerating Quantum Circuit Simulation with Symbolic Execution and Loop Summarization. IEEE/ACM International Conference on Computer-Aided Design (ICCAD '24), October 27--31, 2024, New York, NY, USA. New York: Association for Computing Machinery, 2025. p. 1-9. ISBN: 979-8-4007-1077-3.
Typ
článek ve sborníku konference
Jazyk
anglicky
Autoři
Jobranová Sára, Bc., FIT (FIT), UITS (FIT)
Lengál Ondřej, doc. Ing., Ph.D., UITS (FIT)
Chen Yu-Fang
CHEN, T.
JIANG, J.
Abstrakt

Quantum circuit simulation is the basic tool for reasoning over quantum programs.
Despite the tremendous advance in the simulator technology in the recent years,
the performance of simulators is still unsatisfactory on non-trivial circuits,
which slows down the development of new quantum systems. In this work, we develop
a loop summarizing simulator based on multi-terminal binary decision diagrams
(MTBDDs) with efficiently customized quantum gate operations. The simulator is
capable of automatic loop summarization using symbolic execution, which saves
repetitive computation for circuits with iterative structures. Experimental
results show the simulator outperforms state-of-the-art simulators on some
standard circuits, such as Grover's algorithm, by several orders of magnitude.

Klíčová slova

quantum circuit simulation binary decision diagrams symbolic execution loop
summarization

Rok
2025
Strany
1–9
Sborník
IEEE/ACM International Conference on Computer-Aided Design (ICCAD '24), October 27--31, 2024, New York, NY, USA
Konference
IEEE/ACM International Conference On Computer-Aided Design
ISBN
979-8-4007-1077-3
Vydavatel
Association for Computing Machinery
Místo
New York
DOI
10.1145/3676536.3676711
BibTeX 
@inproceedings{BUT189135,
  author="JOBRANOVÁ, S. and LENGÁL, O. and CHEN, Y. and CHEN, T. and JIANG, J.",
  title="Accelerating Quantum Circuit Simulation with Symbolic Execution and Loop Summarization",
  booktitle="IEEE/ACM International Conference on Computer-Aided Design (ICCAD '24), October 27--31, 2024, New York, NY, USA",
  year="2025",
  pages="1--9",
  publisher="Association for Computing Machinery",
  address="New York",
  doi="10.1145/3676536.3676711",
  isbn="979-8-4007-1077-3"
}
Projekty
Efektivní konečné automaty pro automatické usuzování, MŠMT, ERC CZ, LL1908, zahájení: 2020-01-01, ukončení: 2024-12-31, ukončen
Reliable, Secure, and Intelligent Computer Systems, VUT, Vnitřní projekty VUT, FIT-S-23-8151, zahájení: 2023-03-01, ukončení: 2026-02-28, řešení
Reprezentace Booleovských funkcí pomocí adaptabilní datové struktury, GAČR, Standardní projekty, GA23-07565S, zahájení: 2023-01-01, ukončení: 2025-12-31, řešení
Výzkumné skupiny
Automata@FIT (VZ Automata@FIT)
Výzkumná skupina automatizované analýzy a verifikace - VeriFIT (VZ VERIFIT)
Pracoviště
Ústav inteligentních systémů (UITS)
Nahoru