Detail výsledku

Feedback loops detection for RT circuit test application purposes based on an algebraic method

MIKA, D.; KOTÁSEK, Z. Feedback loops detection for RT circuit test application purposes based on an algebraic method. Proc. of IFAC Workshop on Programmable Devices and Systems Conference. Ostrava: Faculty of Electrical Engineering and Computer Science, VSB-TU Ostrava, 2003. p. 447-452. ISBN: 0-08-044130-0.
Typ
článek ve sborníku konference
Jazyk
anglicky
Autoři
Mika Daniel, Ing., Ph.D., FIT (FIT)
Kotásek Zdeněk, doc. Ing., CSc.
Abstrakt

In the paper, the problem of feedback loops identification in a digitalcircuit is discussed. The alternative of a circuit representation as amathematical structure - labelled directed graph - is presented. It isshown how mutual interconnections between circuit elements can beanalysed - relation and adjacency matrices will be used for thispurpose. It will be presented how to detect feedback loops in thecircuit by means of mathematical operations on relation and adjacencymatrices. The set of sequences of elements, each sequence representedby the list of elements in feedback loops is the output of themethodology. The principles of the methodology will be illustrated onan example.

Klíčová slova

adjacency matrix, register transfer level, testability analysis, data transporters, data processors, relations, graphs

Rok
2003
Strany
447–452
Sborník
Proc. of IFAC Workshop on Programmable Devices and Systems Conference
Konference
IFAC Workshop on Programmable Devices and Systems
ISBN
0-08-044130-0
Vydavatel
Faculty of Electrical Engineering and Computer Science, VSB-TU Ostrava
Místo
Ostrava
BibTeX
@inproceedings{BUT13787,
  author="Daniel {Mika} and Zdeněk {Kotásek}",
  title="Feedback loops detection for RT circuit test application purposes based on an algebraic method",
  booktitle="Proc. of IFAC Workshop on Programmable Devices and Systems Conference",
  year="2003",
  pages="447--452",
  publisher="Faculty of Electrical Engineering and Computer Science, VSB-TU Ostrava",
  address="Ostrava",
  isbn="0-08-044130-0"
}
Projekty
Formální postupy v diagnostice číslicových obvodů - verifikace testovatelného návrhu, GAČR, Standardní projekty, GA102/01/1531, zahájení: 2001-01-01, ukončení: 2003-12-31, ukončen
Pracoviště
Nahoru