Detail výsledku

Optimizing Communication Architectures for Parallel Embedded Systems

DVOŘÁK, V. Optimizing Communication Architectures for Parallel Embedded Systems. In Design of Embedded Control Systems. Berlin: Springer Verlag, 2004. p. 225-234. ISBN: 0-387-23630-9.
Typ
kapitola, resp. kapitoly v odborné knize
Jazyk
anglicky
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Abstrakt

The paper addresses  the issue of prototyping group communications in application-specific multi-processor systems or SoC. Group communications may have a dramatic impact on the performance and this is why performance estimation of these systems, either bus-based SMPs or message-passing networks of DSPs is undertaken using a CSP-based tool Transim. Variations in computation granularity, communication algorithms, interconnect topology, distribution of data and code to processors as well as in processor count, clock rate, link speed, bus bandwidth, cache line size and other parameters can be easily accounted for. The technique is demonstrated on parallel FFT on 2 to 8 processors.

Klíčová slova

parallel embedded systems, multiprocessor simulation, group communication, performance estimation

Rok
2004
Strany
225–234
Kniha
Design of Embedded Control Systems
ISBN
0-387-23630-9
Vydavatel
Springer Verlag
Místo
Berlin
BibTeX
@inbook{BUT55530,
  author="Václav {Dvořák}",
  title="Optimizing Communication Architectures for Parallel Embedded Systems",
  booktitle="Design of Embedded Control Systems",
  year="2004",
  publisher="Springer Verlag",
  address="Berlin",
  pages="225--234",
  isbn="0-387-23630-9"
}
Projekty
Predikce a ladění paralelní výkonnosti, GAČR, Standardní projekty, GA102/02/0503, zahájení: 2002-01-01, ukončení: 2004-12-31, ukončen
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