Detail výsledku

Testability Improvements Based on the Combination of Analytical and Evolutionary Approaches at RT Level

STRNADEL, J.; KOTÁSEK, Z. Testability Improvements Based on the Combination of Analytical and Evolutionary Approaches at RT Level. Proceedings of Euromicro Symposium on Digital System Design Architectures, Methods and Tools DSD'2002. Los Alamitos: IEEE Computer Society Press, 2002. p. 166-173. ISBN: 0-7695-1790-0.
Typ
článek ve sborníku konference
Jazyk
anglicky
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Abstrakt

In the paper a new heuristic approach to the RTL testability analysis is presented. It is shown how the values of controllability/observability factors reflecting the structure of the circuit and other factors can be utilised to find solutions which are sub-optimal but still acceptable for the designer. The goal of the methodology is to enable the identification of such testability solutions which satisfy concrete requirements in terms of the number of registers included into the scan chain, the area overhead and the test application time as a result of RTL testability analysis. The approach is based on the combination of analytical and evolutionary approaches at the RT level.

Klíčová slova

design for testability, scan technique, scan register, scan chain, state-space analysis, evolutionary approach, genetic algorithm

Rok
2002
Strany
166–173
Sborník
Proceedings of Euromicro Symposium on Digital System Design Architectures, Methods and Tools DSD'2002
Konference
EUROMICRO Symposium on Digital System Design: Architecture, Methods and Tools
ISBN
0-7695-1790-0
Vydavatel
IEEE Computer Society Press
Místo
Los Alamitos
BibTeX
@inproceedings{BUT10243,
  author="Josef {Strnadel} and Zdeněk {Kotásek}",
  title="Testability Improvements Based on the Combination of Analytical and Evolutionary Approaches at RT Level",
  booktitle="Proceedings of Euromicro Symposium on Digital System Design Architectures, Methods and Tools DSD'2002",
  year="2002",
  pages="166--173",
  publisher="IEEE Computer Society Press",
  address="Los Alamitos",
  isbn="0-7695-1790-0",
  url="https://www.fit.vut.cz/research/publication/6980/"
}
Soubory
Projekty
Formální postupy v diagnostice číslicových obvodů - verifikace testovatelného návrhu, GAČR, Standardní projekty, GA102/01/1531, zahájení: 2001-01-01, ukončení: 2003-12-31, ukončen
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