Detail výsledku

Polymorphic RTL Computational Elements

RŮŽIČKA, R.; ŠIMEK, V.; NEVORAL, J. Polymorphic RTL Computational Elements. In Proceedings of the DSD 2023. Durres: IEEE Computer Society, 2023. p. 523-530. ISBN: 979-8-3503-4419-6.
Typ
článek ve sborníku konference
Jazyk
anglicky
Autoři
Abstrakt

The concept of polymorphic electronics allows to efficiently implement two or more functions in a single circuit, whereas the currently selected function depends on the state of the circuit operating environment. The key components of such circuits are polymorphic gates. Since the introduction of polymorphic electronics, few tens of polymorphic gates have been published. However, a large number of them exhibit parameters that fall behind ubiquitous CMOS technology. As a result of that, the perspective of their utilisation for real applications becomes rather bleak. This paper shows a new approach to polymorphic electronics. It is based on gates whose behaviour depends on the polarity of dedicated power supply rails. Such approach allows to design gates with significantly improved parameters. Several sets of bi-functional polymorphic gates were designed and validated by HSPICE simulations. The advantage of newly designed gates is demonstrated at two higher levels of abstraction - bi-functional RTL components and applications (bi-functional image filters). Both designed RTL components and image filters showed to be significantly area-efficient compared to the best known solutions.

Klíčová slova

Polymorphic gate, ambipolar transistor, polymorphic
electronics, digital circuit.

Rok
2023
Strany
523–530
Sborník
Proceedings of the DSD 2023
Konference
26th Euromicro Conference on Digital System Design
ISBN
979-8-3503-4419-6
Vydavatel
IEEE Computer Society
Místo
Durres
DOI
EID Scopus
BibTeX
@inproceedings{BUT185178,
  author="Richard {Růžička} and Václav {Šimek} and Jan {Nevoral}",
  title="Polymorphic RTL Computational Elements",
  booktitle="Proceedings of the DSD 2023",
  year="2023",
  pages="523--530",
  publisher="IEEE Computer Society",
  address="Durres",
  doi="10.1109/DSD60849.2023.00078",
  isbn="979-8-3503-4419-6"
}
Projekty
Application-specific HW/SW architectures and their applications, VUT, Vnitřní projekty VUT, FIT-S-23-8141, zahájení: 2023-03-01, ukončení: 2026-02-28, řešení
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