Detail výsledku

FSM-based IP cores analysis

KUBEK, J. FSM-based IP cores analysis. Proceedings of the Seventh International Scientific Conference ECI 2006. Košice: Faculty of Electrical Engineering and Informatics, University of Technology Košice, 2006. p. 238-241. ISBN: 80-8073-598-0.
Typ
článek ve sborníku konference
Jazyk
anglicky
Autoři
Kubek Ján, Ing., FIT (FIT), UPSY (FIT)
Abstrakt

This paper deals with methods of finite state machines (FSMs) localization in FSM-based softcore intellectual property cores. An approach based on compilation techniques is presented. The main goal is to minimize test application time by offering a alternative way to test the control part of the FSM in the core. The proposed method was implemented using Savant VHDL compiler, experimental results are presented in the paper together with the perspective of the future research.

Klíčová slova

System on chip, SoC, intellectual property (IP) core, embedded core, IEEE P1500 standard proposal, test wrapper, finite automata, controller, FSM

Rok
2006
Strany
238–241
Sborník
Proceedings of the Seventh International Scientific Conference ECI 2006
Konference
7TH International Scientific Conference Electronic Computers and Informatics 2006
ISBN
80-8073-598-0
Vydavatel
Faculty of Electrical Engineering and Informatics, University of Technology Košice
Místo
Košice
BibTeX 
@inproceedings{BUT22381,
  author="Ján {Kubek}",
  title="FSM-based IP cores analysis",
  booktitle="Proceedings of the Seventh International Scientific Conference ECI 2006",
  year="2006",
  pages="238--241",
  publisher="Faculty of Electrical Engineering and Informatics, University of Technology Košice",
  address="Košice",
  isbn="80-8073-598-0"
}
Projekty
Specifický výzkum, VUT, Vnitřní projekty VUT, SV, zahájení: 2005-01-01, ukončení: 2009-12-31, ukončen
Pracoviště
Ústav počítačových systémů (UPSY)
Nahoru