Detail výsledku

Testability Enhancement of Multilevel Designs Guided by Testability Analysis Method

STRNADEL, J. Testability Enhancement of Multilevel Designs Guided by Testability Analysis Method. Proceedings of Electronic Devices and Systems IMAPS CS International Conference. Brno: Brno University of Technology, 2008. p. 367-372. ISBN: 978-80-214-3717-3.
Typ
článek ve sborníku konference
Jazyk
anglicky
Autoři
Strnadel Josef, Ing., Ph.D., UPSY (FIT)
Abstrakt

In the paper, multilevel extension of previously published register-transfer level testability analysis method is presented. It is illustrated how libraries and net-lists of multilevel designs can be described in special language developed for the purpose, how the method can be linked up to commercial electronic design automation tools and how information offered by the method can be utilized for guidance during testability enhancement of digital designs.

Klíčová slova

digital, circuit, design, testability, multilevel, enhancement, guidance

URL
Rok
2008
Strany
367–372
Sborník
Proceedings of Electronic Devices and Systems IMAPS CS International Conference
Konference
15th Electronic Devices and Systems IMAPS CS International Conference
ISBN
978-80-214-3717-3
Vydavatel
Brno University of Technology
Místo
Brno
BibTeX 
@inproceedings{BUT27713,
  author="Josef {Strnadel}",
  title="Testability Enhancement of Multilevel Designs Guided by Testability Analysis Method",
  booktitle="Proceedings of Electronic Devices and Systems IMAPS CS International Conference",
  year="2008",
  pages="367--372",
  publisher="Brno University of Technology",
  address="Brno",
  isbn="978-80-214-3717-3",
  url="https://www.fit.vut.cz/research/publication/8631/"
}
Projekty
Výzkum informačních technologií z hlediska bezpečnosti, MŠMT, Institucionální prostředky SR ČR (např. VZ, VC), MSM0021630528, zahájení: 2007-01-01, ukončení: 2013-12-31, řešení
Výzkumné skupiny
Výzkumná skupina Spolehlivé číslicové systémy (VZ DEPSYS)
Pracoviště
Ústav počítačových systémů (UPSY)
Nahoru