Detail publikace

Low Power Testing

KOTÁSEK Zdeněk a ŠKARVADA Jaroslav. Low Power Testing. Design and Test Technology foír Dependable Systems-on-Chip. Hershey: IGI Global, 2012, s. 395-412. ISBN 978-1-60960-212-3.
Název česky
Snížení příkonu při testování
Typ
kapitola v knize
Jazyk
angličtina
Autoři
Abstrakt
Přenosné počítačové systémy a vestavěné systémy jsou systémy, které jsou napájeny z baterií.

therefore they are designed with the goal of low power consumption. Low power consumption becomes important not only during normal operational mode but during test application as well when switching activity is higher than in normal mode. In this chapter, a survey of basic concepts and methodologies from the area of low power testing is provided. First, it is explained how power consumption is related to switching activities during test application. Then, the concepts of static and dynamic power consumption are discussed together with metrics which can be possibly used to evaluate power consumption.  The survey of methods the goal of which is to reduce dynamic power consumption during test application is then provided followed by a short survey of power-constrained test scheduling methods.

Rok
2012
Strany
395-412
Kniha
Design and Test Technology foír Dependable Systems-on-Chip
ISBN
978-1-60960-212-3
Vydavatel
IGI Global
Místo
Hershey, US
BibTeX
@INBOOK{FITPUB10256,
   author = "Zden\v{e}k Kot\'{a}sek and Jaroslav \v{S}karvada",
   title = "Low Power Testing",
   pages = "395--412",
   booktitle = "Design and Test Technology fo\'{i}r Dependable Systems-on-Chip",
   year = 2012,
   location = "Hershey, US",
   publisher = "IGI Global",
   ISBN = "978-1-60960-212-3",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/10256"
}
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