Detail výsledku

24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems

SHAFIQUE, M.; STEININGER, A.; SEKANINA, L.; KRSTIĆ, M.; STOJANOVIC, G.; MRÁZEK, V. 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems. USA: Institute of Electrical and Electronics Engineers, 2021. 158 p. ISBN: 978-1-6654-3595-6.
Typ
konferenční sborník (ne stať)
Jazyk
anglicky
Autoři
Shafique Muhammad, FIT (FIT)
Steininger Andreas, Prof. Dr.
Sekanina Lukáš, prof. Ing., Ph.D., UPSY (FIT)
KRSTIĆ, M.
STOJANOVIC, G.
Mrázek Vojtěch, Ing., Ph.D., UPSY (FIT)
Abstrakt

This proceedings contains reviewed papers accepted for publication and presentation at the 24th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS2021). Since its origins in 1997 DDECS has continued to provide a forum for exchanging ideas, discussing research results, and presenting practical applications in the areas of design, test, and diagnosis of electronic circuits and systems.

Klíčová slova

electronic circuit, design, test, design method, digital circuit, analog circuit

Rok
2021
Strany
158
Konference
24th International Symposium on Design and Diagnostics of Electronic Circuits and Systems
ISBN
978-1-6654-3595-6
Vydavatel
Institute of Electrical and Electronics Engineers
Místo
USA
DOI
EID Scopus
BibTeX
@proceedings{BUT171158,
  editor="SHAFIQUE, M. and STEININGER, A. and SEKANINA, L. and KRSTIĆ, M. and STOJANOVIC, G. and MRÁZEK, V.",
  title="24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems",
  year="2021",
  pages="158",
  publisher="Institute of Electrical and Electronics Engineers",
  address="USA",
  doi="10.1109/DDECS52668.2021.9417019",
  isbn="978-1-6654-3595-6"
}
Projekty
Návrh, optimalizace a evaluace aplikačně specifických počítačových systémů, VUT, Vnitřní projekty VUT, FIT-S-20-6309, zahájení: 2020-03-01, ukončení: 2023-02-28, ukončen
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