Detail výsledku
Intrinsic Evolution of Sorting Networks: A Novel Complete Hardware Implementation for FPGAs
KOŘENEK, J.; SEKANINA, L. Intrinsic Evolution of Sorting Networks: A Novel Complete Hardware Implementation for FPGAs. Evolvable Systems: From Biology to Hardware. Lecture Notes in Computer Science. Berlin: Springer Verlag, 2005. p. 46-55. ISBN: 978-3-540-28736-0.
Typ
článek ve sborníku konference
Jazyk
anglicky
Autoři
Abstrakt
A specialized architecture was developed and evaluated to evolve relatively
large sorting networks in an ordinary FPGA. Genetic unit and fitness function are also implemented on the same FPGA. We evolved sorting networks up to N=28. The evolution of the largest sorting networks requires 10 hours in FPGA running at 100 MHz. The experiments were performed using COMBO6 card.
Klíčová slova
Evolution, FPGA, sorting network
URL
Rok
2005
Strany
46–55
Sborník
Evolvable Systems: From Biology to Hardware
Řada
Lecture Notes in Computer Science
Svazek
3637
Konference
International Conference on Evolvable Systems: From Biology to Hardware
ISBN
978-3-540-28736-0
Vydavatel
Springer Verlag
Místo
Berlin
BibTeX
@inproceedings{BUT33687,
author="Jan {Kořenek} and Lukáš {Sekanina}",
title="Intrinsic Evolution of Sorting Networks: A Novel Complete Hardware Implementation for FPGAs",
booktitle="Evolvable Systems: From Biology to Hardware",
year="2005",
series="Lecture Notes in Computer Science",
volume="3637",
pages="46--55",
publisher="Springer Verlag",
address="Berlin",
isbn="978-3-540-28736-0",
url="http://www.fit.vutbr.cz/~sekanina/publ/ices05/sn.pdf"
}
Projekty
Metody návrhu aplikací založených na vyvíjejících se obvodech, GAČR, Postdoktorandské granty, GP102/03/P004, zahájení: 2003-01-01, ukončení: 2005-12-31, ukončen
Výzkumné skupiny
Pracoviště
Ústav počítačových systémů
(UPSY)