Detail výsledku

Reliability Analysis and Improvement of FPGA-based Robot Controller

PODIVÍNSKÝ, J.; LOJDA, J.; ČEKAN, O.; PÁNEK, R.; KOTÁSEK, Z. Reliability Analysis and Improvement of FPGA-based Robot Controller. In Proceedings of the 2017 20th Euromicro Conference on Digital System Design. Vídeň: IEEE Computer Society, 2017. p. 337-344. ISBN: 978-1-5386-2145-5.
Typ
článek ve sborníku konference
Jazyk
anglicky
Autoři
Podivínský Jakub, Ing., Ph.D., UPSY (FIT)
Lojda Jakub, Ing., Ph.D., UPSY (FIT)
Čekan Ondřej, Ing., Ph.D., UPSY (FIT)
Pánek Richard, Ing., Ph.D., UPSY (FIT)
Kotásek Zdeněk, doc. Ing., CSc., UPSY (FIT), UTKO (FEKT)
Abstrakt

Faults occurring in the safety-critical systems can lead to the failure of the whole system and can cause high economical losses or endanger human health. As an example space, aerospace or medical systems can serve which are working in the environment with increased occurrence of faults. Fault avoidance and fault tolerance are the main techniques the goal of which is to avoid such situations. This paper is the continuation of the previously published work and presents an approach to evaluation of the fault tolerance techniques by monitoring the impact of faults in the experimental electro-mechanical system which consists of the robot in maze and its robot controller. The experiments with the robot controller hardened against faults are combined with the reliability analysis on theoretical level in this paper. The impact of faults artificially injected into the robot controller, in which Triple Modular Redundancy is applied, is monitored and used for the statistic reliability analysis.

Klíčová slova

Reliability Analysis
TMR
FPGA
Fault Tolerance
Robot Controller
Reconfiguration

Rok
2017
Strany
337–344
Sborník
Proceedings of the 2017 20th Euromicro Conference on Digital System Design
Konference
20th Euromicro Conference on Digital Systems Design
ISBN
978-1-5386-2145-5
Vydavatel
IEEE Computer Society
Místo
Vídeň
DOI
UT WoS
000427097100047
EID Scopus
BibTeX
@inproceedings{BUT144431,
  author="Jakub {Podivínský} and Jakub {Lojda} and Ondřej {Čekan} and Richard {Pánek} and Zdeněk {Kotásek}",
  title="Reliability Analysis and Improvement of FPGA-based Robot Controller",
  booktitle="Proceedings of the 2017 20th Euromicro Conference on Digital System Design",
  year="2017",
  pages="337--344",
  publisher="IEEE Computer Society",
  address="Vídeň",
  doi="10.1109/DSD.2017.15",
  isbn="978-1-5386-2145-5",
  url="https://www.fit.vut.cz/research/publication/11425/"
}
Soubory
Projekty
IT4Innovations excellence in science, MŠMT, Národní program udržitelnosti II, LQ1602, zahájení: 2016-01-01, ukončení: 2020-12-31, ukončen
Pokročilé paralelní a vestavěné počítačové systémy, VUT, Vnitřní projekty VUT, FIT-S-17-3994, zahájení: 2017-03-01, ukončení: 2020-02-29, ukončen
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