Detail výsledku

SWITCHED - CAPACITOR ADC WITH LOW POWER CONSUMPTION - BEHAVIOURAL MODELLING

HÁZE, J.; VRBA, R.; SKOČDOPOLE, M.; FUJCIK, L. SWITCHED - CAPACITOR ADC WITH LOW POWER CONSUMPTION - BEHAVIOURAL MODELLING. In Socrates Workshop 2004. Intensive Training Programme in Electronic. Crete, Greece: 2004. 6 p. ISBN: 80-214-2819-8.
Typ
článek ve sborníku konference
Jazyk
anglicky
Autoři
Háze Jiří, doc. Ing., Ph.D., UMEL (FEKT)
Vrba Radimír, prof. Ing., CSc., UMEL (FEKT)
Skočdopole Michal, Ing., UMEL (FEKT)
Fujcik Lukáš, doc. Ing., Ph.D., UMEL (FEKT)
Abstrakt

A paper deals with 12-bit, low power switched- capacitor (SC) analog-todigital
converter (ADC). Since the ADC will be used in portable
applications the low power consumption is the key task for design. The
paper focuses on block design of ADC and its behavioural modelling. The
basic block topology design is also outlined. Techniques for avoiding of
capacitor mismatch, clock feedthrough, finite gain and offset of Op-Amp
etc. are utilized in the design.

Klíčová slova

A/D Converter, switched capacitors, low power, error correction, block diagram.

Rok
2004
Strany
6
Sborník
Socrates Workshop 2004. Intensive Training Programme in Electronic
Vydání
1
Konference
Socrates Workshop 2004. Intensive Training Programme in Electronic System Design
ISBN
80-214-2819-8
Místo
Crete, Greece
BibTeX
@inproceedings{BUT11884,
  author="Jiří {Háze} and Radimír {Vrba} and Michal {Skočdopole} and Lukáš {Fujcik}",
  title="SWITCHED - CAPACITOR ADC WITH LOW POWER CONSUMPTION - BEHAVIOURAL MODELLING",
  booktitle="Socrates Workshop 2004. Intensive Training Programme in Electronic",
  year="2004",
  number="1",
  pages="6",
  address="Crete, Greece",
  isbn="80-214-2819-8"
}
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